1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;

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90 CPSR saved_cpsr = tc->readMiscReg(MISCREG_CPSR) |
91 tc->readIntReg(INTREG_CONDCODES);
92
93
94 cpsr.mode = nextMode();
95 cpsr.it1 = cpsr.it2 = 0;
96 cpsr.j = 0;
97
98 if (sctlr.te)
99 cpsr.t = 1;
100 cpsr.a = cpsr.a | abortDisable();
101 cpsr.f = cpsr.f | fiqDisable();
102 cpsr.i = 1;
103 tc->setMiscReg(MISCREG_CPSR, cpsr);
104 tc->setIntReg(INTREG_LR, tc->readPC() +
105 (saved_cpsr.t ? thumbPcOffset() : armPcOffset()));
106
107 switch (nextMode()) {

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117 case MODE_UNDEFINED:
118 tc->setMiscReg(MISCREG_SPSR_UND, saved_cpsr);
119 break;
120 case MODE_ABORT:
121 tc->setMiscReg(MISCREG_SPSR_ABT, saved_cpsr);
122 break;
123 default:
124 panic("unknown Mode\n");
125 }
126
127 DPRINTF(Faults, "Invoking Fault: %s cpsr: %#x PC: %#x lr: %#x\n", name(), cpsr,
128 tc->readPC(), tc->readIntReg(INTREG_LR));
129 tc->setPC(getVector(tc));
130 tc->setNextPC(getVector(tc) + cpsr.t ? 2 : 4 );
131}
132#endif // FULL_SYSTEM
133
134// return via SUBS pc, lr, xxx; rfe, movs, ldm
135
136
137
138} // namespace ArmISA
139