1/*
2 * Copyright (c) 2010, 2012-2014, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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273 "SP Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC,
274 0, 0, 0, 0, true, false, false, EC_STACK_PTR_ALIGNMENT, FaultStat()
275};
276template<> ArmFault::FaultVals ArmFaultVals<SystemError>::vals = {
277 // Some dummy values (SError is AArch64-only)
278 "SError", 0x000, 0x180, 0x380, 0x580, 0x780, MODE_SVC,
279 0, 0, 0, 0, false, true, true, EC_SERROR, FaultStat()
280};
281template<> ArmFault::FaultVals ArmFaultVals<ArmSev>::vals = {
282 // Some dummy values
283 "ArmSev Flush", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC,
284 0, 0, 0, 0, false, true, true, EC_UNKNOWN, FaultStat()
285};
286template<> ArmFault::FaultVals ArmFaultVals<IllegalInstSetStateFault>::vals = {
287 // Some dummy values (SPAlignmentFault is AArch64-only)
288 "Illegal Inst Set State Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC,

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1389 HCR hcr = tc->readMiscRegNoEffect(MISCREG_HCR);
1390
1391 toHyp = (!scr.ea && hcr.amo && !inSecureState(tc)) ||
1392 (!scr.ea && !scr.rw && !hcr.amo && !inSecureState(tc));
1393 return toHyp;
1394}
1395
1396void
1397ArmSev::invoke(ThreadContext *tc, const StaticInstPtr &inst) {
1398 DPRINTF(Faults, "Invoking ArmSev Fault\n");
1399 if (!FullSystem)
1400 return;
1401
1402 // Set sev_mailbox to 1, clear the pending interrupt from remote
1403 // SEV execution and let pipeline continue as pcState is still
1404 // valid.

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1420template class ArmFaultVals<VirtualInterrupt>;
1421template class ArmFaultVals<FastInterrupt>;
1422template class ArmFaultVals<VirtualFastInterrupt>;
1423template class ArmFaultVals<SupervisorTrap>;
1424template class ArmFaultVals<SecureMonitorTrap>;
1425template class ArmFaultVals<PCAlignmentFault>;
1426template class ArmFaultVals<SPAlignmentFault>;
1427template class ArmFaultVals<SystemError>;
1428template class ArmFaultVals<ArmSev>;
1429template class AbortFault<PrefetchAbort>;
1430template class AbortFault<DataAbort>;
1431template class AbortFault<VirtualDataAbort>;
1432
1433
1434IllegalInstSetStateFault::IllegalInstSetStateFault()
1435{}
1436
1437
1438} // namespace ArmISA