1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 36 unchanged lines hidden (view full) --- 45 46#include <cassert> 47 48#include "arch/arm/miscregs.hh" 49#include "arch/arm/types.hh" 50#include "arch/generic/decode_cache.hh" 51#include "base/types.hh" 52#include "cpu/static_inst.hh" |
53#include "enums/DecoderFlavour.hh" |
54 55namespace ArmISA 56{ 57 |
58class ISA; |
59class Decoder 60{ 61 protected: 62 //The extended machine instruction being generated 63 ExtMachInst emi; 64 MachInst data; 65 bool bigThumb; 66 bool instDone; 67 bool outOfBytes; 68 int offset; 69 bool foundIt; 70 ITSTATE itBits; 71 72 int fpscrLen; 73 int fpscrStride; 74 |
75 Enums::DecoderFlavour decoderFlavour; 76 |
77 /// A cache of decoded instruction objects. 78 static GenericISA::BasicDecodeCache defaultCache; 79 80 /** 81 * Pre-decode an instruction from the current state of the 82 * decoder. 83 */ 84 void process(); 85 86 /** 87 * Consume bytes by moving the offset into the data word and 88 * sanity check the results. 89 */ 90 void consumeBytes(int numBytes); 91 92 public: // Decoder API |
93 Decoder(ISA* isa = nullptr); |
94 95 /** Reset the decoders internal state. */ 96 void reset(); 97 98 /** 99 * Can the decoder accept more data? 100 * 101 * A CPU model uses this method to determine if the decoder can --- 103 unchanged lines hidden --- |