1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_ARM_DECODER_HH__
32#define __ARCH_ARM_DECODER_HH__
33
34#include <cassert>
35
36#include "arch/arm/miscregs.hh"
37#include "arch/arm/types.hh"
| 1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_ARM_DECODER_HH__
32#define __ARCH_ARM_DECODER_HH__
33
34#include <cassert>
35
36#include "arch/arm/miscregs.hh"
37#include "arch/arm/types.hh"
|
| 38#include "arch/generic/decode_cache.hh"
|
38#include "base/types.hh"
| 39#include "base/types.hh"
|
39#include "cpu/decode_cache.hh"
| 40#include "cpu/static_inst.hh"
|
40
41class ThreadContext;
42
43namespace ArmISA
44{
45
46class Decoder
47{
48 protected:
49 ThreadContext * tc;
50 //The extended machine instruction being generated
51 ExtMachInst emi;
52 MachInst data;
53 bool bigThumb;
54 bool instDone;
55 bool outOfBytes;
56 int offset;
57 bool foundIt;
58 ITSTATE itBits;
59
60 public:
61 void reset()
62 {
63 bigThumb = false;
64 offset = 0;
65 emi = 0;
66 instDone = false;
67 outOfBytes = true;
68 foundIt = false;
69 }
70
71 Decoder(ThreadContext * _tc) : tc(_tc), data(0)
72 {
73 reset();
74 }
75
76 ThreadContext * getTC()
77 {
78 return tc;
79 }
80
81 void
82 setTC(ThreadContext * _tc)
83 {
84 tc = _tc;
85 }
86
87 void process();
88
89 //Use this to give data to the decoder. This should be used
90 //when there is control flow.
91 void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);
92
93 //Use this to give data to the decoder. This should be used
94 //when instructions are executed in order.
95 void moreBytes(MachInst machInst)
96 {
97 moreBytes(0, 0, machInst);
98 }
99
100 inline void consumeBytes(int numBytes)
101 {
102 offset += numBytes;
103 assert(offset <= sizeof(MachInst));
104 if (offset == sizeof(MachInst))
105 outOfBytes = true;
106 }
107
108 bool needMoreBytes() const
109 {
110 return outOfBytes;
111 }
112
113 bool instReady() const
114 {
115 return instDone;
116 }
117
118 int getInstSize() const
119 {
120 return (!emi.thumb || emi.bigThumb) ? 4 : 2;
121 }
122
123 protected:
124 /// A cache of decoded instruction objects.
| 41
42class ThreadContext;
43
44namespace ArmISA
45{
46
47class Decoder
48{
49 protected:
50 ThreadContext * tc;
51 //The extended machine instruction being generated
52 ExtMachInst emi;
53 MachInst data;
54 bool bigThumb;
55 bool instDone;
56 bool outOfBytes;
57 int offset;
58 bool foundIt;
59 ITSTATE itBits;
60
61 public:
62 void reset()
63 {
64 bigThumb = false;
65 offset = 0;
66 emi = 0;
67 instDone = false;
68 outOfBytes = true;
69 foundIt = false;
70 }
71
72 Decoder(ThreadContext * _tc) : tc(_tc), data(0)
73 {
74 reset();
75 }
76
77 ThreadContext * getTC()
78 {
79 return tc;
80 }
81
82 void
83 setTC(ThreadContext * _tc)
84 {
85 tc = _tc;
86 }
87
88 void process();
89
90 //Use this to give data to the decoder. This should be used
91 //when there is control flow.
92 void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);
93
94 //Use this to give data to the decoder. This should be used
95 //when instructions are executed in order.
96 void moreBytes(MachInst machInst)
97 {
98 moreBytes(0, 0, machInst);
99 }
100
101 inline void consumeBytes(int numBytes)
102 {
103 offset += numBytes;
104 assert(offset <= sizeof(MachInst));
105 if (offset == sizeof(MachInst))
106 outOfBytes = true;
107 }
108
109 bool needMoreBytes() const
110 {
111 return outOfBytes;
112 }
113
114 bool instReady() const
115 {
116 return instDone;
117 }
118
119 int getInstSize() const
120 {
121 return (!emi.thumb || emi.bigThumb) ? 4 : 2;
122 }
123
124 protected:
125 /// A cache of decoded instruction objects.
|
125 static DecodeCache defaultCache;
| 126 static GenericISA::BasicDecodeCache defaultCache;
|
126
127 public:
128 StaticInstPtr decodeInst(ExtMachInst mach_inst);
129
130 /// Decode a machine instruction.
131 /// @param mach_inst The binary instruction to decode.
132 /// @retval A pointer to the corresponding StaticInst object.
133 StaticInstPtr
134 decode(ExtMachInst mach_inst, Addr addr)
135 {
136 return defaultCache.decode(this, mach_inst, addr);
137 }
138
139 StaticInstPtr
140 decode(ArmISA::PCState &nextPC)
141 {
142 if (!instDone)
143 return NULL;
144
145 assert(instDone);
146 ExtMachInst thisEmi = emi;
147 nextPC.npc(nextPC.pc() + getInstSize());
148 if (foundIt)
149 nextPC.nextItstate(itBits);
150 thisEmi.itstate = nextPC.itstate();
151 nextPC.size(getInstSize());
152 emi = 0;
153 instDone = false;
154 foundIt = false;
155 return decode(thisEmi, nextPC.instAddr());
156 }
157};
158
159} // namespace ArmISA
160
161#endif // __ARCH_ARM_DECODER_HH__
| 127
128 public:
129 StaticInstPtr decodeInst(ExtMachInst mach_inst);
130
131 /// Decode a machine instruction.
132 /// @param mach_inst The binary instruction to decode.
133 /// @retval A pointer to the corresponding StaticInst object.
134 StaticInstPtr
135 decode(ExtMachInst mach_inst, Addr addr)
136 {
137 return defaultCache.decode(this, mach_inst, addr);
138 }
139
140 StaticInstPtr
141 decode(ArmISA::PCState &nextPC)
142 {
143 if (!instDone)
144 return NULL;
145
146 assert(instDone);
147 ExtMachInst thisEmi = emi;
148 nextPC.npc(nextPC.pc() + getInstSize());
149 if (foundIt)
150 nextPC.nextItstate(itBits);
151 thisEmi.itstate = nextPC.itstate();
152 nextPC.size(getInstSize());
153 emi = 0;
154 instDone = false;
155 foundIt = false;
156 return decode(thisEmi, nextPC.instAddr());
157 }
158};
159
160} // namespace ArmISA
161
162#endif // __ARCH_ARM_DECODER_HH__
|