1/*
2 * Copyright (c) 2013-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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67 bool outOfBytes;
68 int offset;
69 bool foundIt;
70 ITSTATE itBits;
71
72 int fpscrLen;
73 int fpscrStride;
74
75 Enums::DecoderFlavour decoderFlavour;
76
77 /// A cache of decoded instruction objects.
78 static GenericISA::BasicDecodeCache defaultCache;
79
80 /**
81 * Pre-decode an instruction from the current state of the
82 * decoder.

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192
193
194 public: // ARM-specific decoder state manipulation
195 void setContext(FPSCR fpscr)
196 {
197 fpscrLen = fpscr.len;
198 fpscrStride = fpscr.stride;
199 }
200};
201
202} // namespace ArmISA
203
204#endif // __ARCH_ARM_DECODER_HH__