SConscript (9384:877293183bdf) SConscript (10037:5cac77888310)
1# -*- mode:python -*-
2
1# -*- mode:python -*-
2
3# Copyright (c) 2009 ARM Limited
3# Copyright (c) 2009, 2012-2013 ARM Limited
4# All rights reserved.
5#
6# The license below extends only to copyright in the software and shall
7# not be construed as granting a license to any other intellectual
8# property including but not limited to intellectual property relating
9# to a hardware implementation of the functionality of the software
10# licensed hereunder. You may use the software subject to the license
11# terms below provided that you ensure that this notice is replicated

--- 32 unchanged lines hidden (view full) ---

44Import('*')
45
46if env['TARGET_ISA'] == 'arm':
47# Workaround for bug in SCons version > 0.97d20071212
48# Scons bug id: 2006 M5 Bug id: 308
49 Dir('isa/formats')
50 Source('decoder.cc')
51 Source('faults.cc')
4# All rights reserved.
5#
6# The license below extends only to copyright in the software and shall
7# not be construed as granting a license to any other intellectual
8# property including but not limited to intellectual property relating
9# to a hardware implementation of the functionality of the software
10# licensed hereunder. You may use the software subject to the license
11# terms below provided that you ensure that this notice is replicated

--- 32 unchanged lines hidden (view full) ---

44Import('*')
45
46if env['TARGET_ISA'] == 'arm':
47# Workaround for bug in SCons version > 0.97d20071212
48# Scons bug id: 2006 M5 Bug id: 308
49 Dir('isa/formats')
50 Source('decoder.cc')
51 Source('faults.cc')
52 Source('insts/branch64.cc')
53 Source('insts/data64.cc')
52 Source('insts/macromem.cc')
53 Source('insts/mem.cc')
54 Source('insts/macromem.cc')
55 Source('insts/mem.cc')
56 Source('insts/mem64.cc')
54 Source('insts/misc.cc')
57 Source('insts/misc.cc')
58 Source('insts/misc64.cc')
55 Source('insts/pred_inst.cc')
56 Source('insts/static_inst.cc')
57 Source('insts/vfp.cc')
59 Source('insts/pred_inst.cc')
60 Source('insts/static_inst.cc')
61 Source('insts/vfp.cc')
62 Source('insts/fplib.cc')
58 Source('interrupts.cc')
59 Source('isa.cc')
60 Source('linux/linux.cc')
61 Source('linux/process.cc')
62 Source('linux/system.cc')
63 Source('miscregs.cc')
64 Source('nativetrace.cc')
65 Source('process.cc')
66 Source('remote_gdb.cc')
67 Source('stacktrace.cc')
68 Source('system.cc')
69 Source('table_walker.cc')
63 Source('interrupts.cc')
64 Source('isa.cc')
65 Source('linux/linux.cc')
66 Source('linux/process.cc')
67 Source('linux/system.cc')
68 Source('miscregs.cc')
69 Source('nativetrace.cc')
70 Source('process.cc')
71 Source('remote_gdb.cc')
72 Source('stacktrace.cc')
73 Source('system.cc')
74 Source('table_walker.cc')
75 Source('stage2_mmu.cc')
76 Source('stage2_lookup.cc')
70 Source('tlb.cc')
71 Source('utility.cc')
72 Source('vtophys.cc')
73
74 SimObject('ArmInterrupts.py')
75 SimObject('ArmISA.py')
76 SimObject('ArmNativeTrace.py')
77 SimObject('ArmSystem.py')

--- 14 unchanged lines hidden --- 		77 Source('tlb.cc')
78 Source('utility.cc')
79 Source('vtophys.cc')
80
81 SimObject('ArmInterrupts.py')
82 SimObject('ArmISA.py')
83 SimObject('ArmNativeTrace.py')
84 SimObject('ArmSystem.py')

--- 14 unchanged lines hidden ---