ArmPMU.py (10461:afeb5cdb3907) | ArmPMU.py (10465:a42b8d98fddc) |
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1# -*- mode:python -*- 2# Copyright (c) 2009-2014 ARM Limited 3# All rights reserved. 4# 5# The license below extends only to copyright in the software and shall 6# not be construed as granting a license to any other intellectual 7# property including but not limited to intellectual property relating 8# to a hardware implementation of the functionality of the software --- 64 unchanged lines hidden (view full) --- 73 """Add a probe-based event to the PMU if obj is not None.""" 74 75 if obj is None: 76 return 77 78 for name in args: 79 self._deferred_event_types.append((event_id, obj, name)) 80 | 1# -*- mode:python -*- 2# Copyright (c) 2009-2014 ARM Limited 3# All rights reserved. 4# 5# The license below extends only to copyright in the software and shall 6# not be construed as granting a license to any other intellectual 7# property including but not limited to intellectual property relating 8# to a hardware implementation of the functionality of the software --- 64 unchanged lines hidden (view full) --- 73 """Add a probe-based event to the PMU if obj is not None.""" 74 75 if obj is None: 76 return 77 78 for name in args: 79 self._deferred_event_types.append((event_id, obj, name)) 80 |
81 def addArchEvents(self, 82 cpu=None, 83 itb=None, dtb=None, 84 icache=None, dcache=None, 85 l2cache=None): 86 """Add architected events to the PMU. 87 88 This method can be called multiple times with only a subset of 89 the keyword arguments set. This enables event registration in 90 configuration scripts to happen closer to the instantiation of 91 the instrumented objects (e.g., the memory system) instead of 92 a central point. 93 94 CPU events should also be registered once per CPU that is 95 sharing the PMU (e.g., when switching between CPU models). 96 """ 97 98 bpred = cpu.branchPred if cpu and not isNullPointer(cpu.branchPred) \ 99 else None 100 101 # 0x01: L1I_CACHE_REFILL 102 self.addEventProbe(0x02, itb, "Refills") 103 # 0x03: L2D_CACHE_REFILL 104 # 0x04: L1D_CACHE 105 self.addEventProbe(0x05, dtb, "Refills") 106 self.addEventProbe(0x06, cpu, "RetiredLoads") 107 self.addEventProbe(0x07, cpu, "RetiredStores") 108 self.addEventProbe(0x08, cpu, "RetiredInsts") 109 # 0x09: EXC_TAKEN 110 # 0x0A: EXC_RETURN 111 # 0x0B: CID_WRITE_RETIRED 112 self.addEventProbe(0x0C, cpu, "RetiredBranches") 113 # 0x0D: BR_IMMED_RETIRED 114 # 0x0E: BR_RETURN_RETIRED 115 # 0x0F: UNALIGEND_LDST_RETIRED 116 self.addEventProbe(0x10, bpred, "Misses") 117 self.addEventProbe(0x11, cpu, "Cycles") 118 self.addEventProbe(0x12, bpred, "Branches") 119 self.addEventProbe(0x13, cpu, "RetiredLoads", "RetiredStores") 120 # 0x14: L1I_CACHE 121 # 0x15: L1D_CACHE_WB 122 # 0x16: L2D_CACHE 123 # 0x17: L2D_CACHE_REFILL 124 # 0x18: L2D_CACHE_WB 125 # 0x19: BUS_ACCESS 126 # 0x1A: MEMORY_ERROR 127 # 0x1B: INST_SPEC 128 # 0x1C: TTBR_WRITE_RETIRED 129 # 0x1D: BUS_CYCLES 130 # 0x1E: CHAIN 131 # 0x1F: L1D_CACHE_ALLOCATE 132 # 0x20: L2D_CACHE_ALLOCATE 133 |
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81 platform = Param.Platform(Parent.any, "Platform this device is part of.") 82 eventCounters = Param.Int(31, "Number of supported PMU counters") 83 pmuInterrupt = Param.Int(68, "PMU GIC interrupt number") | 134 platform = Param.Platform(Parent.any, "Platform this device is part of.") 135 eventCounters = Param.Int(31, "Number of supported PMU counters") 136 pmuInterrupt = Param.Int(68, "PMU GIC interrupt number") |