Cross Reference: /gem5/src/arch/arm/ArmISA.py

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ArmISA.py (12109:f29e9c5418aa)	ArmISA.py (12714:6870e0c151b1)
1# Copyright (c) 2012-2013, 2015-2016 ARM Limited	1# Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited
2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 96 unchanged lines hidden (view full) --- 106 "AArch64 Instruction Set Attribute Register 1") 107 108 # 4K \| 64K \| !16K \| !BigEndEL0 \| !SNSMem \| !BigEnd \| 8b ASID \| 40b PA 109 id_aa64mmfr0_el1 = Param.UInt64(0x0000000000f00002, 110 "AArch64 Memory Model Feature Register 0") 111 # Reserved for future expansion 112 id_aa64mmfr1_el1 = Param.UInt64(0x0000000000000000, 113 "AArch64 Memory Model Feature Register 1")	2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 96 unchanged lines hidden (view full) --- 106 "AArch64 Instruction Set Attribute Register 1") 107 108 # 4K \| 64K \| !16K \| !BigEndEL0 \| !SNSMem \| !BigEnd \| 8b ASID \| 40b PA 109 id_aa64mmfr0_el1 = Param.UInt64(0x0000000000f00002, 110 "AArch64 Memory Model Feature Register 0") 111 # Reserved for future expansion 112 id_aa64mmfr1_el1 = Param.UInt64(0x0000000000000000, 113 "AArch64 Memory Model Feature Register 1")
	114 115 # Any access (read/write) to an unimplemented 116 # Implementation Defined registers is not causing an Undefined Instruction. 117 # It is rather executed as a NOP. 118 impdef_nop = Param.Bool(False, 119 "Any access to a MISCREG_IMPDEF_UNIMPL register is executed as NOP")