utility.hh (7693:f1db1000d957) utility.hh (7707:e5b6f1157be3)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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36#include "arch/alpha/isa_traits.hh"
37#include "arch/alpha/registers.hh"
38#include "base/misc.hh"
39#include "config/full_system.hh"
40#include "cpu/thread_context.hh"
41
42namespace AlphaISA {
43
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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36#include "arch/alpha/isa_traits.hh"
37#include "arch/alpha/registers.hh"
38#include "base/misc.hh"
39#include "config/full_system.hh"
40#include "cpu/thread_context.hh"
41
42namespace AlphaISA {
43
44uint64_t getArgument(ThreadContext *tc, int &number, uint8_t size, bool fp);
44uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
45
46inline bool
47inUserMode(ThreadContext *tc)
48{
49 return (tc->readMiscRegNoEffect(IPR_DTB_CM) & 0x18) != 0;
50}
51
52/**

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46inline bool
47inUserMode(ThreadContext *tc)
48{
49 return (tc->readMiscRegNoEffect(IPR_DTB_CM) & 0x18) != 0;
50}
51
52/**

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