utility.hh (5570:13592d41f290) | utility.hh (6325:7a020652cd85) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 97 unchanged lines hidden (view full) --- 106 107inline MachInst 108makeRegisterCopy(int dest, int src) 109{ 110 panic("makeRegisterCopy not implemented"); 111 return 0; 112} 113 | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 97 unchanged lines hidden (view full) --- 106 107inline MachInst 108makeRegisterCopy(int dest, int src) 109{ 110 panic("makeRegisterCopy not implemented"); 111 return 0; 112} 113 |
114// Machine operations 115void saveMachineReg(AnyReg &savereg, const RegFile ®_file, int regnum); 116void restoreMachineReg(RegFile ®s, const AnyReg ®, int regnum); 117 | |
118/** 119 * Function to insure ISA semantics about 0 registers. 120 * @param tc The thread context. 121 */ 122template <class TC> 123void zeroRegisters(TC *tc); 124 125// Alpha IPR register accessors --- 43 unchanged lines hidden --- | 114/** 115 * Function to insure ISA semantics about 0 registers. 116 * @param tc The thread context. 117 */ 118template <class TC> 119void zeroRegisters(TC *tc); 120 121// Alpha IPR register accessors --- 43 unchanged lines hidden --- |