utility.hh (3577:605c370622b1) utility.hh (3961:42374ae36922)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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116
117 /**
118 * Function to insure ISA semantics about 0 registers.
119 * @param tc The thread context.
120 */
121 template <class TC>
122 void zeroRegisters(TC *tc);
123
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 107 unchanged lines hidden (view full) ---

116
117 /**
118 * Function to insure ISA semantics about 0 registers.
119 * @param tc The thread context.
120 */
121 template <class TC>
122 void zeroRegisters(TC *tc);
123
124#if FULL_SYSTEM
125 // Alpha IPR register accessors
124 // Alpha IPR register accessors
126 inline bool PcPAL(Addr addr) { return addr & 0x1; }
125 inline bool PcPAL(Addr addr) { return addr & 0x3; }
126#if FULL_SYSTEM
127
128 ////////////////////////////////////////////////////////////////////////
129 //
130 // Translation stuff
131 //
132
133 inline Addr PteAddr(Addr a) { return (a & PteMask) << PteShift; }
134

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128 ////////////////////////////////////////////////////////////////////////
129 //
130 // Translation stuff
131 //
132
133 inline Addr PteAddr(Addr a) { return (a & PteMask) << PteShift; }
134

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