utility.hh (3120:e49afeaf79e9) utility.hh (3484:9b7ac1654430)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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38#include "arch/alpha/regfile.hh"
39#include "base/misc.hh"
40#include "cpu/thread_context.hh"
41
42namespace AlphaISA
43{
44
45 static inline ExtMachInst
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 29 unchanged lines hidden (view full) ---

38#include "arch/alpha/regfile.hh"
39#include "base/misc.hh"
40#include "cpu/thread_context.hh"
41
42namespace AlphaISA
43{
44
45 static inline ExtMachInst
46 makeExtMI(MachInst inst, ThreadContext * xc) {
46 makeExtMI(MachInst inst, Addr pc) {
47#if FULL_SYSTEM
48 ExtMachInst ext_inst = inst;
47#if FULL_SYSTEM
48 ExtMachInst ext_inst = inst;
49 if (xc->readPC() && 0x1)
50 return ext_inst|=(static_cast<ExtMachInst>(xc->readPC() & 0x1) << 32);
49 if (pc && 0x1)
50 return ext_inst|=(static_cast<ExtMachInst>(pc & 0x1) << 32);
51 else
52 return ext_inst;
53#else
54 return ExtMachInst(inst);
55#endif
56 }
57
58 inline bool isCallerSaveIntegerRegister(unsigned int reg) {

--- 102 unchanged lines hidden --- 		51 else
52 return ext_inst;
53#else
54 return ExtMachInst(inst);
55#endif
56 }
57
58 inline bool isCallerSaveIntegerRegister(unsigned int reg) {

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