utility.hh (2665:a124942bacb8) utility.hh (2680:246e7104f744)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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104 void saveMachineReg(AnyReg &savereg, const RegFile &reg_file,
105 int regnum);
106
107 void restoreMachineReg(RegFile &regs, const AnyReg &reg,
108 int regnum);
109
110 /**
111 * Function to insure ISA semantics about 0 registers.
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 95 unchanged lines hidden (view full) ---

104 void saveMachineReg(AnyReg &savereg, const RegFile &reg_file,
105 int regnum);
106
107 void restoreMachineReg(RegFile &regs, const AnyReg &reg,
108 int regnum);
109
110 /**
111 * Function to insure ISA semantics about 0 registers.
112 * @param xc The execution context.
112 * @param tc The thread context.
113 */
113 */
114 template <class XC>
115 void zeroRegisters(XC *xc);
114 template <class TC>
115 void zeroRegisters(TC *tc);
116
117#if FULL_SYSTEM
118 // Alpha IPR register accessors
119 inline bool PcPAL(Addr addr) { return addr & 0x1; }
120
121 ////////////////////////////////////////////////////////////////////////
122 //
123 // Translation stuff

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138 inline Addr
139 TruncPage(Addr addr)
140 { return addr & ~(PageBytes - 1); }
141
142 inline Addr
143 RoundPage(Addr addr)
144 { return (addr + PageBytes - 1) & ~(PageBytes - 1); }
145
116
117#if FULL_SYSTEM
118 // Alpha IPR register accessors
119 inline bool PcPAL(Addr addr) { return addr & 0x1; }
120
121 ////////////////////////////////////////////////////////////////////////
122 //
123 // Translation stuff

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138 inline Addr
139 TruncPage(Addr addr)
140 { return addr & ~(PageBytes - 1); }
141
142 inline Addr
143 RoundPage(Addr addr)
144 { return (addr + PageBytes - 1) & ~(PageBytes - 1); }
145
146 void initCPU(ExecContext *xc, int cpuId);
147 void initIPRs(ExecContext *xc, int cpuId);
146 void initCPU(ThreadContext *tc, int cpuId);
147 void initIPRs(ThreadContext *tc, int cpuId);
148
149 /**
150 * Function to check for and process any interrupts.
148
149 /**
150 * Function to check for and process any interrupts.
151 * @param xc The execution context.
151 * @param tc The thread context.
152 */
152 */
153 template <class XC>
154 void processInterrupts(XC *xc);
153 template <class TC>
154 void processInterrupts(TC *tc);
155#endif
156
157} // namespace AlphaISA
158
159#endif
155#endif
156
157} // namespace AlphaISA
158
159#endif