utility.hh (10407:a9023811bf9e) | utility.hh (10417:710ee116eb68) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 91 unchanged lines hidden (view full) --- 100 101void copyRegs(ThreadContext *src, ThreadContext *dest); 102 103void copyMiscRegs(ThreadContext *src, ThreadContext *dest); 104 105void skipFunction(ThreadContext *tc); 106 107inline void | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 91 unchanged lines hidden (view full) --- 100 101void copyRegs(ThreadContext *src, ThreadContext *dest); 102 103void copyMiscRegs(ThreadContext *src, ThreadContext *dest); 104 105void skipFunction(ThreadContext *tc); 106 107inline void |
108advancePC(PCState &pc, const StaticInstPtr inst) | 108advancePC(PCState &pc, const StaticInstPtr &inst) |
109{ 110 pc.advance(); 111} 112 113inline uint64_t 114getExecutingAsid(ThreadContext *tc) 115{ 116 return DTB_ASN_ASN(tc->readMiscRegNoEffect(IPR_DTB_ASN)); 117} 118 119} // namespace AlphaISA 120 121#endif // __ARCH_ALPHA_UTILITY_HH__ | 109{ 110 pc.advance(); 111} 112 113inline uint64_t 114getExecutingAsid(ThreadContext *tc) 115{ 116 return DTB_ASN_ASN(tc->readMiscRegNoEffect(IPR_DTB_ASN)); 117} 118 119} // namespace AlphaISA 120 121#endif // __ARCH_ALPHA_UTILITY_HH__ |