utility.cc (7707:e5b6f1157be3) | utility.cc (7720:65d338a8dba4) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 63 unchanged lines hidden (view full) --- 72 // Then loop through the floating point registers. 73 for (int i = 0; i < NumFloatRegs; ++i) 74 dest->setFloatRegBits(i, src->readFloatRegBits(i)); 75 76 // Copy misc. registers 77 copyMiscRegs(src, dest); 78 79 // Lastly copy PC/NPC | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 63 unchanged lines hidden (view full) --- 72 // Then loop through the floating point registers. 73 for (int i = 0; i < NumFloatRegs; ++i) 74 dest->setFloatRegBits(i, src->readFloatRegBits(i)); 75 76 // Copy misc. registers 77 copyMiscRegs(src, dest); 78 79 // Lastly copy PC/NPC |
80 dest->setPC(src->readPC()); 81 dest->setNextPC(src->readNextPC()); | 80 dest->pcState(src->pcState()); |
82} 83 84void 85copyMiscRegs(ThreadContext *src, ThreadContext *dest) 86{ 87 dest->setMiscRegNoEffect(MISCREG_FPCR, 88 src->readMiscRegNoEffect(MISCREG_FPCR)); 89 dest->setMiscRegNoEffect(MISCREG_UNIQ, --- 4 unchanged lines hidden (view full) --- 94 src->readMiscRegNoEffect(MISCREG_LOCKADDR)); 95 96 copyIprs(src, dest); 97} 98 99void 100skipFunction(ThreadContext *tc) 101{ | 81} 82 83void 84copyMiscRegs(ThreadContext *src, ThreadContext *dest) 85{ 86 dest->setMiscRegNoEffect(MISCREG_FPCR, 87 src->readMiscRegNoEffect(MISCREG_FPCR)); 88 dest->setMiscRegNoEffect(MISCREG_UNIQ, --- 4 unchanged lines hidden (view full) --- 93 src->readMiscRegNoEffect(MISCREG_LOCKADDR)); 94 95 copyIprs(src, dest); 96} 97 98void 99skipFunction(ThreadContext *tc) 100{ |
102 Addr newpc = tc->readIntReg(ReturnAddressReg); 103 tc->setPC(newpc); 104 tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst)); | 101 TheISA::PCState newPC = tc->pcState(); 102 newPC.set(tc->readIntReg(ReturnAddressReg)); 103 tc->pcState(newPC); |
105} 106 107 108} // namespace AlphaISA 109 | 104} 105 106 107} // namespace AlphaISA 108 |