utility.cc (7693:f1db1000d957) utility.cc (7707:e5b6f1157be3)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 26 unchanged lines hidden (view full) ---

35#if FULL_SYSTEM
36#include "arch/alpha/vtophys.hh"
37#include "mem/vport.hh"
38#endif
39
40namespace AlphaISA {
41
42uint64_t
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 26 unchanged lines hidden (view full) ---

35#if FULL_SYSTEM
36#include "arch/alpha/vtophys.hh"
37#include "mem/vport.hh"
38#endif
39
40namespace AlphaISA {
41
42uint64_t
43getArgument(ThreadContext *tc, int &number, uint8_t size, bool fp)
43getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
44{
45#if FULL_SYSTEM
46 const int NumArgumentRegs = 6;
47 if (number < NumArgumentRegs) {
48 if (fp)
49 return tc->readFloatRegBits(16 + number);
50 else
51 return tc->readIntReg(16 + number);

--- 58 unchanged lines hidden --- 		44{
45#if FULL_SYSTEM
46 const int NumArgumentRegs = 6;
47 if (number < NumArgumentRegs) {
48 if (fp)
49 return tc->readFloatRegBits(16 + number);
50 else
51 return tc->readIntReg(16 + number);

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