1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 * Ali Saidi
30 */
31
32#include "arch/alpha/utility.hh"
33
34#if FULL_SYSTEM
35#include "arch/alpha/vtophys.hh"
36#include "mem/fs_translating_port_proxy.hh"
37#endif
38
39namespace AlphaISA {
40
41uint64_t
42getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
43{
44#if FULL_SYSTEM
45 const int NumArgumentRegs = 6;
46 if (number < NumArgumentRegs) {
47 if (fp)
48 return tc->readFloatRegBits(16 + number);
49 else
50 return tc->readIntReg(16 + number);
51 } else {
52 Addr sp = tc->readIntReg(StackPointerReg);
53 FSTranslatingPortProxy* vp = tc->getVirtProxy();
54 uint64_t arg = vp->read<uint64_t>(sp +
55 (number-NumArgumentRegs) * sizeof(uint64_t));
56 return arg;
57 }
58#else
59 panic("getArgument() is Full system only\n");
60 M5_DUMMY_RETURN;
61#endif
62}
63
64void
65copyRegs(ThreadContext *src, ThreadContext *dest)
66{
67 // First loop through the integer registers.
68 for (int i = 0; i < NumIntRegs; ++i)
69 dest->setIntReg(i, src->readIntReg(i));

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