1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 25 unchanged lines hidden (view full) ---

34#include "mem/fs_translating_port_proxy.hh"
35#include "sim/full_system.hh"
36
37namespace AlphaISA {
38
39uint64_t
40getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
41{
42 if (!FullSystem) {
43 panic("getArgument() is Full system only\n");
44 M5_DUMMY_RETURN;
45 }
46
47 const int NumArgumentRegs = 6;
48 if (number < NumArgumentRegs) {
49 if (fp)
50 return tc->readFloatRegBits(16 + number);
51 else
52 return tc->readIntReg(16 + number);
53 } else {
54 Addr sp = tc->readIntReg(StackPointerReg);
55 FSTranslatingPortProxy* vp = tc->getVirtProxy();
56 uint64_t arg = vp->read<uint64_t>(sp +
57 (number-NumArgumentRegs) * sizeof(uint64_t));
58 return arg;
59 }
60}
61
62void
63copyRegs(ThreadContext *src, ThreadContext *dest)
64{
65 // First loop through the integer registers.
66 for (int i = 0; i < NumIntRegs; ++i)
67 dest->setIntReg(i, src->readIntReg(i));

--- 38 unchanged lines hidden ---