types.hh (5251:8de83cada19d) types.hh (5569:baeee670d4ce)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 18 unchanged lines hidden (view full) ---

27 *
28 * Authors: Nathan Binkert
29 * Steve Reinhardt
30 */
31
32#ifndef __ARCH_ALPHA_TYPES_HH__
33#define __ARCH_ALPHA_TYPES_HH__
34
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 18 unchanged lines hidden (view full) ---

27 *
28 * Authors: Nathan Binkert
29 * Steve Reinhardt
30 */
31
32#ifndef __ARCH_ALPHA_TYPES_HH__
33#define __ARCH_ALPHA_TYPES_HH__
34
35#include <inttypes.h>
35#include "sim/host.hh"
36
36
37namespace AlphaISA
38{
37namespace AlphaISA {
39
38
40 typedef uint32_t MachInst;
41 typedef uint64_t ExtMachInst;
42 typedef uint8_t RegIndex;
39typedef uint32_t MachInst;
40typedef uint64_t ExtMachInst;
41typedef uint8_t RegIndex;
43
42
44 typedef uint64_t IntReg;
45 typedef uint64_t LargestRead;
43typedef uint64_t IntReg;
44typedef uint64_t LargestRead;
46
45
47 // floating point register file entry type
48 typedef double FloatReg;
49 typedef uint64_t FloatRegBits;
46// floating point register file entry type
47typedef double FloatReg;
48typedef uint64_t FloatRegBits;
50
49
51 // control register file contents
52 typedef uint64_t MiscReg;
50// control register file contents
51typedef uint64_t MiscReg;
53
52
54 typedef union {
55 IntReg intreg;
56 FloatReg fpreg;
57 MiscReg ctrlreg;
58 } AnyReg;
53union AnyReg
54{
55 IntReg intreg;
56 FloatReg fpreg;
57 MiscReg ctrlreg;
58};
59
59
60 enum RegContextParam
61 {
62 CONTEXT_PALMODE
63 };
60enum RegContextParam
61{
62 CONTEXT_PALMODE
63};
64
64
65 typedef bool RegContextVal;
65typedef bool RegContextVal;
66
66
67 enum annotes {
68 ANNOTE_NONE = 0,
69 // An impossible number for instruction annotations
70 ITOUCH_ANNOTE = 0xffffffff,
71 };
67enum annotes
68{
69 ANNOTE_NONE = 0,
70 // An impossible number for instruction annotations
71 ITOUCH_ANNOTE = 0xffffffff,
72};
72
73
73 struct CoreSpecific {
74 int core_type;
75 };
74struct CoreSpecific
75{
76 int core_type;
77};
78
76} // namespace AlphaISA
77
79} // namespace AlphaISA
80
78#endif
81#endif // __ARCH_ALPHA_TYPES_HH__