types.hh (2665:a124942bacb8) | types.hh (2972:f84c6c5309ce) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 27 * 28 * Authors: Nathan Binkert 29 * Steve Reinhardt 30 */ 31 32#ifndef __ARCH_ALPHA_TYPES_HH__ 33#define __ARCH_ALPHA_TYPES_HH__ 34 | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 27 * 28 * Authors: Nathan Binkert 29 * Steve Reinhardt 30 */ 31 32#ifndef __ARCH_ALPHA_TYPES_HH__ 33#define __ARCH_ALPHA_TYPES_HH__ 34 |
35#include "sim/host.hh" | 35#include <inttypes.h> |
36 37namespace AlphaISA 38{ 39 40 typedef uint32_t MachInst; 41 typedef uint64_t ExtMachInst; 42 typedef uint8_t RegIndex; 43 --- 7 unchanged lines hidden (view full) --- 51 typedef uint64_t MiscReg; 52 53 typedef union { 54 IntReg intreg; 55 FloatReg fpreg; 56 MiscReg ctrlreg; 57 } AnyReg; 58 | 36 37namespace AlphaISA 38{ 39 40 typedef uint32_t MachInst; 41 typedef uint64_t ExtMachInst; 42 typedef uint8_t RegIndex; 43 --- 7 unchanged lines hidden (view full) --- 51 typedef uint64_t MiscReg; 52 53 typedef union { 54 IntReg intreg; 55 FloatReg fpreg; 56 MiscReg ctrlreg; 57 } AnyReg; 58 |
59 enum RegContextParam 60 { 61 CONTEXT_PALMODE 62 }; 63 64 typedef bool RegContextVal; 65 |
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59 enum annotes { 60 ANNOTE_NONE = 0, 61 // An impossible number for instruction annotations 62 ITOUCH_ANNOTE = 0xffffffff, 63 }; 64 65} // namespace AlphaISA 66 67#endif | 66 enum annotes { 67 ANNOTE_NONE = 0, 68 // An impossible number for instruction annotations 69 ITOUCH_ANNOTE = 0xffffffff, 70 }; 71 72} // namespace AlphaISA 73 74#endif |