1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
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37namespace AlphaISA
38{
39
40 typedef uint32_t MachInst;
41 typedef uint64_t ExtMachInst;
42 typedef uint8_t RegIndex;
43
44 typedef uint64_t IntReg;
45
46 // floating point register file entry type
47 typedef double FloatReg;
48 typedef uint64_t FloatRegBits;
49
50 // control register file contents
51 typedef uint64_t MiscReg;
52
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2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
--- 28 unchanged lines hidden (view full) ---
37namespace AlphaISA
38{
39
40 typedef uint32_t MachInst;
41 typedef uint64_t ExtMachInst;
42 typedef uint8_t RegIndex;
43
44 typedef uint64_t IntReg;
45
46 // floating point register file entry type
47 typedef double FloatReg;
48 typedef uint64_t FloatRegBits;
49
50 // control register file contents
51 typedef uint64_t MiscReg;
52
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