tlb.hh (2665:a124942bacb8) | tlb.hh (2680:246e7104f744) |
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1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 27 unchanged lines hidden (view full) --- 36 37#include "arch/alpha/ev5.hh" 38#include "arch/alpha/isa_traits.hh" 39#include "arch/alpha/faults.hh" 40#include "base/statistics.hh" 41#include "mem/request.hh" 42#include "sim/sim_object.hh" 43 | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 27 unchanged lines hidden (view full) --- 36 37#include "arch/alpha/ev5.hh" 38#include "arch/alpha/isa_traits.hh" 39#include "arch/alpha/faults.hh" 40#include "base/statistics.hh" 41#include "mem/request.hh" 42#include "sim/sim_object.hh" 43 |
44class ExecContext; | 44class ThreadContext; |
45 46class AlphaTLB : public SimObject 47{ 48 protected: 49 typedef std::multimap<Addr, int> PageTable; 50 PageTable lookupTable; // Quick lookup into page table 51 52 AlphaISA::PTE *table; // the Page Table --- 37 unchanged lines hidden (view full) --- 90 mutable Stats::Scalar<> misses; 91 mutable Stats::Scalar<> acv; 92 mutable Stats::Formula accesses; 93 94 public: 95 AlphaITB(const std::string &name, int size); 96 virtual void regStats(); 97 | 45 46class AlphaTLB : public SimObject 47{ 48 protected: 49 typedef std::multimap<Addr, int> PageTable; 50 PageTable lookupTable; // Quick lookup into page table 51 52 AlphaISA::PTE *table; // the Page Table --- 37 unchanged lines hidden (view full) --- 90 mutable Stats::Scalar<> misses; 91 mutable Stats::Scalar<> acv; 92 mutable Stats::Formula accesses; 93 94 public: 95 AlphaITB(const std::string &name, int size); 96 virtual void regStats(); 97 |
98 Fault translate(RequestPtr &req, ExecContext *xc) const; | 98 Fault translate(RequestPtr &req, ThreadContext *tc) const; |
99}; 100 101class AlphaDTB : public AlphaTLB 102{ 103 protected: 104 mutable Stats::Scalar<> read_hits; 105 mutable Stats::Scalar<> read_misses; 106 mutable Stats::Scalar<> read_acv; --- 6 unchanged lines hidden (view full) --- 113 Stats::Formula misses; 114 Stats::Formula acv; 115 Stats::Formula accesses; 116 117 public: 118 AlphaDTB(const std::string &name, int size); 119 virtual void regStats(); 120 | 99}; 100 101class AlphaDTB : public AlphaTLB 102{ 103 protected: 104 mutable Stats::Scalar<> read_hits; 105 mutable Stats::Scalar<> read_misses; 106 mutable Stats::Scalar<> read_acv; --- 6 unchanged lines hidden (view full) --- 113 Stats::Formula misses; 114 Stats::Formula acv; 115 Stats::Formula accesses; 116 117 public: 118 AlphaDTB(const std::string &name, int size); 119 virtual void regStats(); 120 |
121 Fault translate(RequestPtr &req, ExecContext *xc, bool write) const; | 121 Fault translate(RequestPtr &req, ThreadContext *tc, bool write) const; |
122}; 123 124#endif // __ALPHA_MEMORY_HH__ | 122}; 123 124#endif // __ALPHA_MEMORY_HH__ |