tlb.hh (12406:86bde4a026b5) | tlb.hh (12749:223c83ed9979) |
---|---|
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 100 unchanged lines hidden (view full) --- 109 static bool 110 validVirtualAddress(Addr vaddr) 111 { 112 // unimplemented bits must be all 0 or all 1 113 Addr unimplBits = vaddr & VAddrUnImplMask; 114 return unimplBits == 0 || unimplBits == VAddrUnImplMask; 115 } 116 | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 100 unchanged lines hidden (view full) --- 109 static bool 110 validVirtualAddress(Addr vaddr) 111 { 112 // unimplemented bits must be all 0 or all 1 113 Addr unimplBits = vaddr & VAddrUnImplMask; 114 return unimplBits == 0 || unimplBits == VAddrUnImplMask; 115 } 116 |
117 static Fault checkCacheability(RequestPtr &req, bool itb = false); | 117 static Fault checkCacheability(const RequestPtr &req, bool itb = false); |
118 119 // Checkpointing 120 void serialize(CheckpointOut &cp) const override; 121 void unserialize(CheckpointIn &cp) override; 122 123 // Most recently used page table entries 124 TlbEntry *EntryCache[3]; 125 inline void --- 6 unchanged lines hidden (view full) --- 132 updateCache(TlbEntry *entry) { 133 EntryCache[2] = EntryCache[1]; 134 EntryCache[1] = EntryCache[0]; 135 EntryCache[0] = entry; 136 return entry; 137 } 138 139 protected: | 118 119 // Checkpointing 120 void serialize(CheckpointOut &cp) const override; 121 void unserialize(CheckpointIn &cp) override; 122 123 // Most recently used page table entries 124 TlbEntry *EntryCache[3]; 125 inline void --- 6 unchanged lines hidden (view full) --- 132 updateCache(TlbEntry *entry) { 133 EntryCache[2] = EntryCache[1]; 134 EntryCache[1] = EntryCache[0]; 135 EntryCache[0] = entry; 136 return entry; 137 } 138 139 protected: |
140 Fault translateData(RequestPtr req, ThreadContext *tc, bool write); 141 Fault translateInst(RequestPtr req, ThreadContext *tc); | 140 Fault translateData(const RequestPtr &req, ThreadContext *tc, bool write); 141 Fault translateInst(const RequestPtr &req, ThreadContext *tc); |
142 143 public: 144 Fault translateAtomic( | 142 143 public: 144 Fault translateAtomic( |
145 RequestPtr req, ThreadContext *tc, Mode mode) override; | 145 const RequestPtr &req, ThreadContext *tc, Mode mode) override; |
146 void translateTiming( | 146 void translateTiming( |
147 RequestPtr req, ThreadContext *tc, | 147 const RequestPtr &req, ThreadContext *tc, |
148 Translation *translation, Mode mode) override; 149 Fault finalizePhysical( | 148 Translation *translation, Mode mode) override; 149 Fault finalizePhysical( |
150 RequestPtr req, ThreadContext *tc, Mode mode) const override; | 150 const RequestPtr &req, ThreadContext *tc, 151 Mode mode) const override; |
151}; 152 153} // namespace AlphaISA 154 155#endif // __ARCH_ALPHA_TLB_HH__ | 152}; 153 154} // namespace AlphaISA 155 156#endif // __ARCH_ALPHA_TLB_HH__ |