tlb.hh (11169:44b5c183c3cd) | tlb.hh (12406:86bde4a026b5) |
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1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 127 unchanged lines hidden (view full) --- 136 return entry; 137 } 138 139 protected: 140 Fault translateData(RequestPtr req, ThreadContext *tc, bool write); 141 Fault translateInst(RequestPtr req, ThreadContext *tc); 142 143 public: | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 127 unchanged lines hidden (view full) --- 136 return entry; 137 } 138 139 protected: 140 Fault translateData(RequestPtr req, ThreadContext *tc, bool write); 141 Fault translateInst(RequestPtr req, ThreadContext *tc); 142 143 public: |
144 Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode); 145 void translateTiming(RequestPtr req, ThreadContext *tc, 146 Translation *translation, Mode mode); 147 /** 148 * translateFunctional stub function for future CheckerCPU support 149 */ 150 Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode); 151 Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const; | 144 Fault translateAtomic( 145 RequestPtr req, ThreadContext *tc, Mode mode) override; 146 void translateTiming( 147 RequestPtr req, ThreadContext *tc, 148 Translation *translation, Mode mode) override; 149 Fault finalizePhysical( 150 RequestPtr req, ThreadContext *tc, Mode mode) const override; |
152}; 153 154} // namespace AlphaISA 155 156#endif // __ARCH_ALPHA_TLB_HH__ | 151}; 152 153} // namespace AlphaISA 154 155#endif // __ARCH_ALPHA_TLB_HH__ |