1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 60 unchanged lines hidden (view full) --- 69 Stats::Formula data_misses; 70 Stats::Formula data_acv; 71 Stats::Formula data_accesses; 72 73 74 typedef std::multimap<Addr, int> PageTable; 75 PageTable lookupTable; // Quick lookup into page table 76 |
77 std::vector<TlbEntry> table; // the Page Table |
78 int nlu; // not last used entry (for replacement) 79 |
80 void nextnlu() { if (++nlu >= table.size()) nlu = 0; } |
81 TlbEntry *lookup(Addr vpn, uint8_t asn); 82 83 public: 84 typedef AlphaTLBParams Params; 85 TLB(const Params *p); 86 virtual ~TLB(); 87 88 void takeOverFrom(BaseTLB *otlb) {} 89 90 virtual void regStats(); 91 |
92 int getsize() const { return table.size(); } |
93 94 TlbEntry &index(bool advance = true); 95 void insert(Addr vaddr, TlbEntry &entry); 96 97 void flushAll(); 98 void flushProcesses(); 99 void flushAddr(Addr addr, uint8_t asn); 100 --- 11 unchanged lines hidden (view full) --- 112 // unimplemented bits must be all 0 or all 1 113 Addr unimplBits = vaddr & VAddrUnImplMask; 114 return unimplBits == 0 || unimplBits == VAddrUnImplMask; 115 } 116 117 static Fault checkCacheability(RequestPtr &req, bool itb = false); 118 119 // Checkpointing |
120 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; 121 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; |
122 123 // Most recently used page table entries 124 TlbEntry *EntryCache[3]; 125 inline void 126 flushCache() 127 { 128 memset(EntryCache, 0, 3 * sizeof(TlbEntry*)); 129 } --- 27 unchanged lines hidden --- |