tlb.cc (5736:426510e758ad) tlb.cc (5891:73084c6bb183)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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312 accesses
313 .name(name() + ".accesses")
314 .desc("ITB accesses");
315
316 accesses = hits + misses;
317}
318
319Fault
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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312 accesses
313 .name(name() + ".accesses")
314 .desc("ITB accesses");
315
316 accesses = hits + misses;
317}
318
319Fault
320ITB::translate(RequestPtr &req, ThreadContext *tc)
320ITB::translateAtomic(RequestPtr &req, ThreadContext *tc)
321{
322 //If this is a pal pc, then set PHYSICAL
323 if (FULL_SYSTEM && PcPAL(req->getPC()))
324 req->setFlags(Request::PHYSICAL);
325
326 if (PcPAL(req->getPC())) {
327 // strip off PAL PC marker (lsb is 1)
328 req->setPaddr((req->getVaddr() & ~3) & PAddrImplMask);

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474
475 hits = read_hits + write_hits;
476 misses = read_misses + write_misses;
477 acv = read_acv + write_acv;
478 accesses = read_accesses + write_accesses;
479}
480
481Fault
321{
322 //If this is a pal pc, then set PHYSICAL
323 if (FULL_SYSTEM && PcPAL(req->getPC()))
324 req->setFlags(Request::PHYSICAL);
325
326 if (PcPAL(req->getPC())) {
327 // strip off PAL PC marker (lsb is 1)
328 req->setPaddr((req->getVaddr() & ~3) & PAddrImplMask);

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474
475 hits = read_hits + write_hits;
476 misses = read_misses + write_misses;
477 acv = read_acv + write_acv;
478 accesses = read_accesses + write_accesses;
479}
480
481Fault
482DTB::translate(RequestPtr &req, ThreadContext *tc, bool write)
482DTB::translateAtomic(RequestPtr &req, ThreadContext *tc, bool write)
483{
484 Addr pc = tc->readPC();
485
486 mode_type mode =
487 (mode_type)DTB_CM_CM(tc->readMiscRegNoEffect(IPR_DTB_CM));
488
489 /**
490 * Check for alignment faults

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484 Addr pc = tc->readPC();
485
486 mode_type mode =
487 (mode_type)DTB_CM_CM(tc->readMiscRegNoEffect(IPR_DTB_CM));
488
489 /**
490 * Check for alignment faults

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