1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Nathan Binkert
30 */
31
32#include <sys/signal.h>
33
34#include "arch/alpha/ev5.hh"
35#include "arch/alpha/system.hh"
36#include "arch/alpha/remote_gdb.hh"
37#include "arch/vtophys.hh"
38#include "base/loader/object_file.hh"
39#include "base/loader/symtab.hh"
40#include "base/trace.hh"
41#include "mem/physical.hh"
42#include "params/AlphaSystem.hh"
43#include "sim/byteswap.hh"
44
45using namespace AlphaISA;
46
46using namespace LittleEndianGuest;
47
47AlphaSystem::AlphaSystem(Params *p)
48 : System(p)
49{
50 consoleSymtab = new SymbolTable;
51 palSymtab = new SymbolTable;
52
53
54 /**
55 * Load the pal, and console code into memory
56 */
57 // Load Console Code
58 console = createObjectFile(params()->console);
59 if (console == NULL)
60 fatal("Could not load console file %s", params()->console);
61
62 // Load pal file
63 pal = createObjectFile(params()->pal);
64 if (pal == NULL)
65 fatal("Could not load PALcode file %s", params()->pal);
66
67
68 // Load program sections into memory
70 pal->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
71 console->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
69 pal->loadSections(&functionalPort, LoadAddrMask);
70 console->loadSections(&functionalPort, LoadAddrMask);
71
72 // load symbols
73 if (!console->loadGlobalSymbols(consoleSymtab))
74 panic("could not load console symbols\n");
75
76 if (!pal->loadGlobalSymbols(palSymtab))
77 panic("could not load pal symbols\n");
78
79 if (!pal->loadLocalSymbols(palSymtab))
80 panic("could not load pal symbols\n");
81
82 if (!console->loadGlobalSymbols(debugSymbolTable))
83 panic("could not load console symbols\n");
84
85 if (!pal->loadGlobalSymbols(debugSymbolTable))
86 panic("could not load pal symbols\n");
87
88 if (!pal->loadLocalSymbols(debugSymbolTable))
89 panic("could not load pal symbols\n");
90
91 Addr addr = 0;
92#ifndef NDEBUG
93 consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic");
94#endif
95
96 /**
97 * Copy the osflags (kernel arguments) into the consoles
98 * memory. (Presently Linux does not use the console service
99 * routine to get these command line arguments, but Tru64 and
100 * others do.)
101 */
102 if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
103 virtPort.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
104 strlen(params()->boot_osflags.c_str()));
105 }
106
107 /**
108 * Set the hardware reset parameter block system type and revision
109 * information to Tsunami.
110 */
111 if (consoleSymtab->findAddress("m5_rpb", addr)) {
112 uint64_t data;
113 data = htog(params()->system_type);
114 virtPort.write(addr+0x50, data);
115 data = htog(params()->system_rev);
116 virtPort.write(addr+0x58, data);
117 } else
118 panic("could not find hwrpb\n");
119
120}
121
122AlphaSystem::~AlphaSystem()
123{
124 delete consoleSymtab;
125 delete console;
126 delete pal;
127#ifdef DEBUG
128 delete consolePanicEvent;
129#endif
130}
131
132/**
133 * This function fixes up addresses that are used to match PCs for
134 * hooking simulator events on to target function executions.
135 *
136 * Alpha binaries may have multiple global offset table (GOT)
137 * sections. A function that uses the GOT starts with a
138 * two-instruction prolog which sets the global pointer (gp == r29) to
139 * the appropriate GOT section. The proper gp value is calculated
140 * based on the function address, which must be passed by the caller
141 * in the procedure value register (pv aka t12 == r27). This sequence
142 * looks like the following:
143 *
144 * opcode Ra Rb offset
145 * ldah gp,X(pv) 09 29 27 X
146 * lda gp,Y(gp) 08 29 29 Y
147 *
148 * for some constant offsets X and Y. The catch is that the linker
149 * (or maybe even the compiler, I'm not sure) may recognize that the
150 * caller and callee are using the same GOT section, making this
151 * prolog redundant, and modify the call target to skip these
152 * instructions. If we check for execution of the first instruction
153 * of a function (the one the symbol points to) to detect when to skip
154 * it, we'll miss all these modified calls. It might work to
155 * unconditionally check for the third instruction, but not all
156 * functions have this prolog, and there's some chance that those
157 * first two instructions could have undesired consequences. So we do
158 * the Right Thing and pattern-match the first two instructions of the
159 * function to decide where to patch.
160 *
161 * Eventually this code should be moved into an ISA-specific file.
162 */
163Addr
164AlphaSystem::fixFuncEventAddr(Addr addr)
165{
166 // mask for just the opcode, Ra, and Rb fields (not the offset)
167 const uint32_t inst_mask = 0xffff0000;
168 // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27
169 const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16);
170 // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
171 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
172
173 uint32_t i1 = virtPort.read<uint32_t>(addr);
175 uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(AlphaISA::MachInst));
174 uint32_t i2 = virtPort.read(addr + sizeof(MachInst));
175
176 if ((i1 & inst_mask) == gp_ldah_pattern &&
177 (i2 & inst_mask) == gp_lda_pattern) {
179 Addr new_addr = addr + 2* sizeof(AlphaISA::MachInst);
178 Addr new_addr = addr + 2* sizeof(MachInst);
179 DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr);
180 return new_addr;
181 } else {
182 return addr;
183 }
184}
185
186
187void
188AlphaSystem::setAlphaAccess(Addr access)
189{
190 Addr addr = 0;
191 if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
193 virtPort.write(addr, htog(AlphaISA::Phys2K0Seg(access)));
192 virtPort.write(addr, htog(Phys2K0Seg(access)));
193 } else
194 panic("could not find m5AlphaAccess\n");
195}
196
197void
198AlphaSystem::serialize(std::ostream &os)
199{
200 System::serialize(os);
201 consoleSymtab->serialize("console_symtab", os);
202 palSymtab->serialize("pal_symtab", os);
203}
204
205
206void
207AlphaSystem::unserialize(Checkpoint *cp, const std::string &section)
208{
209 System::unserialize(cp,section);
210 consoleSymtab->unserialize("console_symtab", cp, section);
211 palSymtab->unserialize("pal_symtab", cp, section);
212}
213
214AlphaSystem *
215AlphaSystemParams::create()
216{
217 return new AlphaSystem(this);
218}