41,42c41
< #include "mem/physical.hh"
< #include "mem/vport.hh"
---
> #include "mem/fs_translating_port_proxy.hh"
66a66
> }
67a68,76
> AlphaSystem::~AlphaSystem()
> {
> delete consoleSymtab;
> delete console;
> delete pal;
> #ifdef DEBUG
> delete consolePanicEvent;
> #endif
> }
68a78,86
> void
> AlphaSystem::initState()
> {
> // Moved from the constructor to here since it relies on the
> // address map being resolved in the interconnect
>
> // Call the initialisation of the super class
> System::initState();
>
70,71c88,89
< pal->loadSections(functionalPort, loadAddrMask);
< console->loadSections(functionalPort, loadAddrMask);
---
> pal->loadSections(physProxy, loadAddrMask);
> console->loadSections(physProxy, loadAddrMask);
104,105c122,123
< virtPort->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
< strlen(params()->boot_osflags.c_str()));
---
> virtProxy->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
> strlen(params()->boot_osflags.c_str()));
115c133
< virtPort->write(addr+0x50, data);
---
> virtProxy->write(addr+0x50, data);
117c135
< virtPort->write(addr+0x58, data);
---
> virtProxy->write(addr+0x58, data);
122,131d139
< AlphaSystem::~AlphaSystem()
< {
< delete consoleSymtab;
< delete console;
< delete pal;
< #ifdef DEBUG
< delete consolePanicEvent;
< #endif
< }
<
173,174c181,182
< uint32_t i1 = virtPort->read<uint32_t>(addr);
< uint32_t i2 = virtPort->read<uint32_t>(addr + sizeof(MachInst));
---
> uint32_t i1 = virtProxy->read<uint32_t>(addr);
> uint32_t i2 = virtProxy->read<uint32_t>(addr + sizeof(MachInst));
191c199
< virtPort->write(addr, htog(Phys2K0Seg(access)));
---
> virtProxy->write(addr, htog(Phys2K0Seg(access)));