1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Nathan Binkert 30 */ 31 32#include <sys/signal.h> 33 34#include "arch/alpha/ev5.hh" 35#include "arch/alpha/system.hh" 36#include "arch/vtophys.hh" 37#include "base/loader/object_file.hh" 38#include "base/loader/symtab.hh" 39#include "base/trace.hh" 40#include "debug/Loader.hh"
| 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Nathan Binkert 30 */ 31 32#include <sys/signal.h> 33 34#include "arch/alpha/ev5.hh" 35#include "arch/alpha/system.hh" 36#include "arch/vtophys.hh" 37#include "base/loader/object_file.hh" 38#include "base/loader/symtab.hh" 39#include "base/trace.hh" 40#include "debug/Loader.hh"
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41#include "mem/fs_translating_port_proxy.hh"
| 41#include "mem/physical.hh" 42#include "mem/vport.hh"
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42#include "params/AlphaSystem.hh" 43#include "sim/byteswap.hh" 44 45using namespace AlphaISA; 46 47AlphaSystem::AlphaSystem(Params *p)
| 43#include "params/AlphaSystem.hh" 44#include "sim/byteswap.hh" 45 46using namespace AlphaISA; 47 48AlphaSystem::AlphaSystem(Params *p)
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48 : System(p)
| 49 : System(p), intrFreq(0)
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49{ 50 consoleSymtab = new SymbolTable; 51 palSymtab = new SymbolTable; 52 53 54 /** 55 * Load the pal, and console code into memory 56 */ 57 // Load Console Code 58 console = createObjectFile(params()->console); 59 if (console == NULL) 60 fatal("Could not load console file %s", params()->console); 61 62 // Load pal file 63 pal = createObjectFile(params()->pal); 64 if (pal == NULL) 65 fatal("Could not load PALcode file %s", params()->pal);
| 50{ 51 consoleSymtab = new SymbolTable; 52 palSymtab = new SymbolTable; 53 54 55 /** 56 * Load the pal, and console code into memory 57 */ 58 // Load Console Code 59 console = createObjectFile(params()->console); 60 if (console == NULL) 61 fatal("Could not load console file %s", params()->console); 62 63 // Load pal file 64 pal = createObjectFile(params()->pal); 65 if (pal == NULL) 66 fatal("Could not load PALcode file %s", params()->pal);
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66}
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67
| 67
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68AlphaSystem::~AlphaSystem() 69{ 70 delete consoleSymtab; 71 delete console; 72 delete pal; 73#ifdef DEBUG 74 delete consolePanicEvent; 75#endif 76}
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77
| 68
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78void 79AlphaSystem::initState() 80{ 81 // Moved from the constructor to here since it relies on the 82 // address map being resolved in the interconnect 83 84 // Call the initialisation of the super class 85 System::initState(); 86
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87 // Load program sections into memory
| 69 // Load program sections into memory
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88 pal->loadSections(physProxy, loadAddrMask); 89 console->loadSections(physProxy, loadAddrMask);
| 70 pal->loadSections(functionalPort, loadAddrMask); 71 console->loadSections(functionalPort, loadAddrMask);
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90 91 // load symbols 92 if (!console->loadGlobalSymbols(consoleSymtab)) 93 panic("could not load console symbols\n"); 94 95 if (!pal->loadGlobalSymbols(palSymtab)) 96 panic("could not load pal symbols\n"); 97 98 if (!pal->loadLocalSymbols(palSymtab)) 99 panic("could not load pal symbols\n"); 100 101 if (!console->loadGlobalSymbols(debugSymbolTable)) 102 panic("could not load console symbols\n"); 103 104 if (!pal->loadGlobalSymbols(debugSymbolTable)) 105 panic("could not load pal symbols\n"); 106 107 if (!pal->loadLocalSymbols(debugSymbolTable)) 108 panic("could not load pal symbols\n"); 109 110 Addr addr = 0; 111#ifndef NDEBUG 112 consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic"); 113#endif 114 115 /** 116 * Copy the osflags (kernel arguments) into the consoles 117 * memory. (Presently Linux does not use the console service 118 * routine to get these command line arguments, but Tru64 and 119 * others do.) 120 */ 121 if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
| 72 73 // load symbols 74 if (!console->loadGlobalSymbols(consoleSymtab)) 75 panic("could not load console symbols\n"); 76 77 if (!pal->loadGlobalSymbols(palSymtab)) 78 panic("could not load pal symbols\n"); 79 80 if (!pal->loadLocalSymbols(palSymtab)) 81 panic("could not load pal symbols\n"); 82 83 if (!console->loadGlobalSymbols(debugSymbolTable)) 84 panic("could not load console symbols\n"); 85 86 if (!pal->loadGlobalSymbols(debugSymbolTable)) 87 panic("could not load pal symbols\n"); 88 89 if (!pal->loadLocalSymbols(debugSymbolTable)) 90 panic("could not load pal symbols\n"); 91 92 Addr addr = 0; 93#ifndef NDEBUG 94 consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic"); 95#endif 96 97 /** 98 * Copy the osflags (kernel arguments) into the consoles 99 * memory. (Presently Linux does not use the console service 100 * routine to get these command line arguments, but Tru64 and 101 * others do.) 102 */ 103 if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
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122 virtProxy->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(), 123 strlen(params()->boot_osflags.c_str()));
| 104 virtPort->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(), 105 strlen(params()->boot_osflags.c_str()));
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124 } 125 126 /** 127 * Set the hardware reset parameter block system type and revision 128 * information to Tsunami. 129 */ 130 if (consoleSymtab->findAddress("m5_rpb", addr)) { 131 uint64_t data; 132 data = htog(params()->system_type);
| 106 } 107 108 /** 109 * Set the hardware reset parameter block system type and revision 110 * information to Tsunami. 111 */ 112 if (consoleSymtab->findAddress("m5_rpb", addr)) { 113 uint64_t data; 114 data = htog(params()->system_type);
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133 virtProxy->write(addr+0x50, data);
| 115 virtPort->write(addr+0x50, data);
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134 data = htog(params()->system_rev);
| 116 data = htog(params()->system_rev);
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135 virtProxy->write(addr+0x58, data);
| 117 virtPort->write(addr+0x58, data);
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136 } else 137 panic("could not find hwrpb\n"); 138} 139
| 118 } else 119 panic("could not find hwrpb\n"); 120} 121
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| 122AlphaSystem::~AlphaSystem() 123{ 124 delete consoleSymtab; 125 delete console; 126 delete pal; 127#ifdef DEBUG 128 delete consolePanicEvent; 129#endif 130} 131
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140/** 141 * This function fixes up addresses that are used to match PCs for 142 * hooking simulator events on to target function executions. 143 * 144 * Alpha binaries may have multiple global offset table (GOT) 145 * sections. A function that uses the GOT starts with a 146 * two-instruction prolog which sets the global pointer (gp == r29) to 147 * the appropriate GOT section. The proper gp value is calculated 148 * based on the function address, which must be passed by the caller 149 * in the procedure value register (pv aka t12 == r27). This sequence 150 * looks like the following: 151 * 152 * opcode Ra Rb offset 153 * ldah gp,X(pv) 09 29 27 X 154 * lda gp,Y(gp) 08 29 29 Y 155 * 156 * for some constant offsets X and Y. The catch is that the linker 157 * (or maybe even the compiler, I'm not sure) may recognize that the 158 * caller and callee are using the same GOT section, making this 159 * prolog redundant, and modify the call target to skip these 160 * instructions. If we check for execution of the first instruction 161 * of a function (the one the symbol points to) to detect when to skip 162 * it, we'll miss all these modified calls. It might work to 163 * unconditionally check for the third instruction, but not all 164 * functions have this prolog, and there's some chance that those 165 * first two instructions could have undesired consequences. So we do 166 * the Right Thing and pattern-match the first two instructions of the 167 * function to decide where to patch. 168 * 169 * Eventually this code should be moved into an ISA-specific file. 170 */ 171Addr 172AlphaSystem::fixFuncEventAddr(Addr addr) 173{ 174 // mask for just the opcode, Ra, and Rb fields (not the offset) 175 const uint32_t inst_mask = 0xffff0000; 176 // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27 177 const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16); 178 // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29 179 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16); 180
| 132/** 133 * This function fixes up addresses that are used to match PCs for 134 * hooking simulator events on to target function executions. 135 * 136 * Alpha binaries may have multiple global offset table (GOT) 137 * sections. A function that uses the GOT starts with a 138 * two-instruction prolog which sets the global pointer (gp == r29) to 139 * the appropriate GOT section. The proper gp value is calculated 140 * based on the function address, which must be passed by the caller 141 * in the procedure value register (pv aka t12 == r27). This sequence 142 * looks like the following: 143 * 144 * opcode Ra Rb offset 145 * ldah gp,X(pv) 09 29 27 X 146 * lda gp,Y(gp) 08 29 29 Y 147 * 148 * for some constant offsets X and Y. The catch is that the linker 149 * (or maybe even the compiler, I'm not sure) may recognize that the 150 * caller and callee are using the same GOT section, making this 151 * prolog redundant, and modify the call target to skip these 152 * instructions. If we check for execution of the first instruction 153 * of a function (the one the symbol points to) to detect when to skip 154 * it, we'll miss all these modified calls. It might work to 155 * unconditionally check for the third instruction, but not all 156 * functions have this prolog, and there's some chance that those 157 * first two instructions could have undesired consequences. So we do 158 * the Right Thing and pattern-match the first two instructions of the 159 * function to decide where to patch. 160 * 161 * Eventually this code should be moved into an ISA-specific file. 162 */ 163Addr 164AlphaSystem::fixFuncEventAddr(Addr addr) 165{ 166 // mask for just the opcode, Ra, and Rb fields (not the offset) 167 const uint32_t inst_mask = 0xffff0000; 168 // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27 169 const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16); 170 // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29 171 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16); 172
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181 uint32_t i1 = virtProxy->read<uint32_t>(addr); 182 uint32_t i2 = virtProxy->read<uint32_t>(addr + sizeof(MachInst));
| 173 uint32_t i1 = virtPort->read<uint32_t>(addr); 174 uint32_t i2 = virtPort->read<uint32_t>(addr + sizeof(MachInst));
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183 184 if ((i1 & inst_mask) == gp_ldah_pattern && 185 (i2 & inst_mask) == gp_lda_pattern) { 186 Addr new_addr = addr + 2 * sizeof(MachInst); 187 DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr); 188 return new_addr; 189 } else { 190 return addr; 191 } 192} 193 194void 195AlphaSystem::setAlphaAccess(Addr access) 196{ 197 Addr addr = 0; 198 if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
| 175 176 if ((i1 & inst_mask) == gp_ldah_pattern && 177 (i2 & inst_mask) == gp_lda_pattern) { 178 Addr new_addr = addr + 2 * sizeof(MachInst); 179 DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr); 180 return new_addr; 181 } else { 182 return addr; 183 } 184} 185 186void 187AlphaSystem::setAlphaAccess(Addr access) 188{ 189 Addr addr = 0; 190 if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
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199 virtProxy->write(addr, htog(Phys2K0Seg(access)));
| 191 virtPort->write(addr, htog(Phys2K0Seg(access)));
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200 } else { 201 panic("could not find m5AlphaAccess\n"); 202 } 203} 204 205void 206AlphaSystem::serialize(std::ostream &os) 207{ 208 System::serialize(os); 209 consoleSymtab->serialize("console_symtab", os); 210 palSymtab->serialize("pal_symtab", os); 211} 212 213void 214AlphaSystem::unserialize(Checkpoint *cp, const std::string §ion) 215{ 216 System::unserialize(cp,section); 217 consoleSymtab->unserialize("console_symtab", cp, section); 218 palSymtab->unserialize("pal_symtab", cp, section); 219} 220 221AlphaSystem * 222AlphaSystemParams::create() 223{ 224 return new AlphaSystem(this); 225}
| 192 } else { 193 panic("could not find m5AlphaAccess\n"); 194 } 195} 196 197void 198AlphaSystem::serialize(std::ostream &os) 199{ 200 System::serialize(os); 201 consoleSymtab->serialize("console_symtab", os); 202 palSymtab->serialize("pal_symtab", os); 203} 204 205void 206AlphaSystem::unserialize(Checkpoint *cp, const std::string §ion) 207{ 208 System::unserialize(cp,section); 209 consoleSymtab->unserialize("console_symtab", cp, section); 210 palSymtab->unserialize("pal_symtab", cp, section); 211} 212 213AlphaSystem * 214AlphaSystemParams::create() 215{ 216 return new AlphaSystem(this); 217}
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