1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Nathan Binkert
30 */
31
32#include <sys/signal.h>
33
34#include "arch/alpha/ev5.hh"
35#include "arch/alpha/system.hh"
36#include "arch/alpha/remote_gdb.hh"
37#include "arch/vtophys.hh"
38#include "base/loader/object_file.hh"
39#include "base/loader/symtab.hh"
40#include "base/trace.hh"
41#include "mem/physical.hh"
| 1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Nathan Binkert
30 */
31
32#include <sys/signal.h>
33
34#include "arch/alpha/ev5.hh"
35#include "arch/alpha/system.hh"
36#include "arch/alpha/remote_gdb.hh"
37#include "arch/vtophys.hh"
38#include "base/loader/object_file.hh"
39#include "base/loader/symtab.hh"
40#include "base/trace.hh"
41#include "mem/physical.hh"
|
| 42#include "params/AlphaSystem.hh"
|
42#include "sim/byteswap.hh"
| 43#include "sim/byteswap.hh"
|
43#include "sim/builder.hh"
| |
44
45
46using namespace LittleEndianGuest;
47
48AlphaSystem::AlphaSystem(Params *p)
49 : System(p)
50{
51 consoleSymtab = new SymbolTable;
52 palSymtab = new SymbolTable;
53
54
55 /**
56 * Load the pal, and console code into memory
57 */
58 // Load Console Code
| 44
45
46using namespace LittleEndianGuest;
47
48AlphaSystem::AlphaSystem(Params *p)
49 : System(p)
50{
51 consoleSymtab = new SymbolTable;
52 palSymtab = new SymbolTable;
53
54
55 /**
56 * Load the pal, and console code into memory
57 */
58 // Load Console Code
|
59 console = createObjectFile(params()->console_path);
| 59 console = createObjectFile(params()->console);
|
60 if (console == NULL)
| 60 if (console == NULL)
|
61 fatal("Could not load console file %s", params()->console_path);
| 61 fatal("Could not load console file %s", params()->console);
|
62
63 // Load pal file
| 62
63 // Load pal file
|
64 pal = createObjectFile(params()->palcode);
| 64 pal = createObjectFile(params()->pal);
|
65 if (pal == NULL)
| 65 if (pal == NULL)
|
66 fatal("Could not load PALcode file %s", params()->palcode);
| 66 fatal("Could not load PALcode file %s", params()->pal);
|
67
68
69 // Load program sections into memory
70 pal->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
71 console->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
72
73 // load symbols
74 if (!console->loadGlobalSymbols(consoleSymtab))
75 panic("could not load console symbols\n");
76
77 if (!pal->loadGlobalSymbols(palSymtab))
78 panic("could not load pal symbols\n");
79
80 if (!pal->loadLocalSymbols(palSymtab))
81 panic("could not load pal symbols\n");
82
83 if (!console->loadGlobalSymbols(debugSymbolTable))
84 panic("could not load console symbols\n");
85
86 if (!pal->loadGlobalSymbols(debugSymbolTable))
87 panic("could not load pal symbols\n");
88
89 if (!pal->loadLocalSymbols(debugSymbolTable))
90 panic("could not load pal symbols\n");
91
92 Addr addr = 0;
93#ifndef NDEBUG
94 consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic");
95#endif
96
97 /**
98 * Copy the osflags (kernel arguments) into the consoles
99 * memory. (Presently Linux does not use the console service
100 * routine to get these command line arguments, but Tru64 and
101 * others do.)
102 */
103 if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
104 virtPort.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
105 strlen(params()->boot_osflags.c_str()));
106 }
107
108 /**
109 * Set the hardware reset parameter block system type and revision
110 * information to Tsunami.
111 */
112 if (consoleSymtab->findAddress("m5_rpb", addr)) {
113 uint64_t data;
114 data = htog(params()->system_type);
115 virtPort.write(addr+0x50, data);
116 data = htog(params()->system_rev);
117 virtPort.write(addr+0x58, data);
118 } else
119 panic("could not find hwrpb\n");
120
121}
122
123AlphaSystem::~AlphaSystem()
124{
125 delete consoleSymtab;
126 delete console;
127 delete pal;
128#ifdef DEBUG
129 delete consolePanicEvent;
130#endif
131}
132
133/**
134 * This function fixes up addresses that are used to match PCs for
135 * hooking simulator events on to target function executions.
136 *
137 * Alpha binaries may have multiple global offset table (GOT)
138 * sections. A function that uses the GOT starts with a
139 * two-instruction prolog which sets the global pointer (gp == r29) to
140 * the appropriate GOT section. The proper gp value is calculated
141 * based on the function address, which must be passed by the caller
142 * in the procedure value register (pv aka t12 == r27). This sequence
143 * looks like the following:
144 *
145 * opcode Ra Rb offset
146 * ldah gp,X(pv) 09 29 27 X
147 * lda gp,Y(gp) 08 29 29 Y
148 *
149 * for some constant offsets X and Y. The catch is that the linker
150 * (or maybe even the compiler, I'm not sure) may recognize that the
151 * caller and callee are using the same GOT section, making this
152 * prolog redundant, and modify the call target to skip these
153 * instructions. If we check for execution of the first instruction
154 * of a function (the one the symbol points to) to detect when to skip
155 * it, we'll miss all these modified calls. It might work to
156 * unconditionally check for the third instruction, but not all
157 * functions have this prolog, and there's some chance that those
158 * first two instructions could have undesired consequences. So we do
159 * the Right Thing and pattern-match the first two instructions of the
160 * function to decide where to patch.
161 *
162 * Eventually this code should be moved into an ISA-specific file.
163 */
164Addr
165AlphaSystem::fixFuncEventAddr(Addr addr)
166{
167 // mask for just the opcode, Ra, and Rb fields (not the offset)
168 const uint32_t inst_mask = 0xffff0000;
169 // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27
170 const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16);
171 // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
172 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
173
174 uint32_t i1 = virtPort.read<uint32_t>(addr);
175 uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(AlphaISA::MachInst));
176
177 if ((i1 & inst_mask) == gp_ldah_pattern &&
178 (i2 & inst_mask) == gp_lda_pattern) {
179 Addr new_addr = addr + 2* sizeof(AlphaISA::MachInst);
180 DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr);
181 return new_addr;
182 } else {
183 return addr;
184 }
185}
186
187
188void
189AlphaSystem::setAlphaAccess(Addr access)
190{
191 Addr addr = 0;
192 if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
193 virtPort.write(addr, htog(EV5::Phys2K0Seg(access)));
194 } else
195 panic("could not find m5AlphaAccess\n");
196}
197
198void
199AlphaSystem::serialize(std::ostream &os)
200{
201 System::serialize(os);
202 consoleSymtab->serialize("console_symtab", os);
203 palSymtab->serialize("pal_symtab", os);
204}
205
206
207void
208AlphaSystem::unserialize(Checkpoint *cp, const std::string §ion)
209{
210 System::unserialize(cp,section);
211 consoleSymtab->unserialize("console_symtab", cp, section);
212 palSymtab->unserialize("pal_symtab", cp, section);
213}
214
| 67
68
69 // Load program sections into memory
70 pal->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
71 console->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
72
73 // load symbols
74 if (!console->loadGlobalSymbols(consoleSymtab))
75 panic("could not load console symbols\n");
76
77 if (!pal->loadGlobalSymbols(palSymtab))
78 panic("could not load pal symbols\n");
79
80 if (!pal->loadLocalSymbols(palSymtab))
81 panic("could not load pal symbols\n");
82
83 if (!console->loadGlobalSymbols(debugSymbolTable))
84 panic("could not load console symbols\n");
85
86 if (!pal->loadGlobalSymbols(debugSymbolTable))
87 panic("could not load pal symbols\n");
88
89 if (!pal->loadLocalSymbols(debugSymbolTable))
90 panic("could not load pal symbols\n");
91
92 Addr addr = 0;
93#ifndef NDEBUG
94 consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic");
95#endif
96
97 /**
98 * Copy the osflags (kernel arguments) into the consoles
99 * memory. (Presently Linux does not use the console service
100 * routine to get these command line arguments, but Tru64 and
101 * others do.)
102 */
103 if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
104 virtPort.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
105 strlen(params()->boot_osflags.c_str()));
106 }
107
108 /**
109 * Set the hardware reset parameter block system type and revision
110 * information to Tsunami.
111 */
112 if (consoleSymtab->findAddress("m5_rpb", addr)) {
113 uint64_t data;
114 data = htog(params()->system_type);
115 virtPort.write(addr+0x50, data);
116 data = htog(params()->system_rev);
117 virtPort.write(addr+0x58, data);
118 } else
119 panic("could not find hwrpb\n");
120
121}
122
123AlphaSystem::~AlphaSystem()
124{
125 delete consoleSymtab;
126 delete console;
127 delete pal;
128#ifdef DEBUG
129 delete consolePanicEvent;
130#endif
131}
132
133/**
134 * This function fixes up addresses that are used to match PCs for
135 * hooking simulator events on to target function executions.
136 *
137 * Alpha binaries may have multiple global offset table (GOT)
138 * sections. A function that uses the GOT starts with a
139 * two-instruction prolog which sets the global pointer (gp == r29) to
140 * the appropriate GOT section. The proper gp value is calculated
141 * based on the function address, which must be passed by the caller
142 * in the procedure value register (pv aka t12 == r27). This sequence
143 * looks like the following:
144 *
145 * opcode Ra Rb offset
146 * ldah gp,X(pv) 09 29 27 X
147 * lda gp,Y(gp) 08 29 29 Y
148 *
149 * for some constant offsets X and Y. The catch is that the linker
150 * (or maybe even the compiler, I'm not sure) may recognize that the
151 * caller and callee are using the same GOT section, making this
152 * prolog redundant, and modify the call target to skip these
153 * instructions. If we check for execution of the first instruction
154 * of a function (the one the symbol points to) to detect when to skip
155 * it, we'll miss all these modified calls. It might work to
156 * unconditionally check for the third instruction, but not all
157 * functions have this prolog, and there's some chance that those
158 * first two instructions could have undesired consequences. So we do
159 * the Right Thing and pattern-match the first two instructions of the
160 * function to decide where to patch.
161 *
162 * Eventually this code should be moved into an ISA-specific file.
163 */
164Addr
165AlphaSystem::fixFuncEventAddr(Addr addr)
166{
167 // mask for just the opcode, Ra, and Rb fields (not the offset)
168 const uint32_t inst_mask = 0xffff0000;
169 // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27
170 const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16);
171 // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
172 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
173
174 uint32_t i1 = virtPort.read<uint32_t>(addr);
175 uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(AlphaISA::MachInst));
176
177 if ((i1 & inst_mask) == gp_ldah_pattern &&
178 (i2 & inst_mask) == gp_lda_pattern) {
179 Addr new_addr = addr + 2* sizeof(AlphaISA::MachInst);
180 DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr);
181 return new_addr;
182 } else {
183 return addr;
184 }
185}
186
187
188void
189AlphaSystem::setAlphaAccess(Addr access)
190{
191 Addr addr = 0;
192 if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
193 virtPort.write(addr, htog(EV5::Phys2K0Seg(access)));
194 } else
195 panic("could not find m5AlphaAccess\n");
196}
197
198void
199AlphaSystem::serialize(std::ostream &os)
200{
201 System::serialize(os);
202 consoleSymtab->serialize("console_symtab", os);
203 palSymtab->serialize("pal_symtab", os);
204}
205
206
207void
208AlphaSystem::unserialize(Checkpoint *cp, const std::string §ion)
209{
210 System::unserialize(cp,section);
211 consoleSymtab->unserialize("console_symtab", cp, section);
212 palSymtab->unserialize("pal_symtab", cp, section);
213}
214
|
215
216BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem)
217
218 Param<Tick> boot_cpu_frequency;
219 SimObjectParam<PhysicalMemory *> physmem;
220 SimpleEnumParam<System::MemoryMode> mem_mode;
221
222 Param<std::string> kernel;
223 Param<std::string> console;
224 Param<std::string> pal;
225
226 Param<std::string> boot_osflags;
227 Param<std::string> readfile;
228 Param<std::string> symbolfile;
229 Param<unsigned int> init_param;
230
231 Param<uint64_t> system_type;
232 Param<uint64_t> system_rev;
233
234END_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem)
235
236BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaSystem)
237
238 INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
239 INIT_PARAM(physmem, "phsyical memory"),
240 INIT_ENUM_PARAM(mem_mode, "Memory Mode, (1=atomic, 2=timing)",
241 System::MemoryModeStrings),
242 INIT_PARAM(kernel, "file that contains the kernel code"),
243 INIT_PARAM(console, "file that contains the console code"),
244 INIT_PARAM(pal, "file that contains palcode"),
245 INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot",
246 "a"),
247 INIT_PARAM_DFLT(readfile, "file to read startup script from", ""),
248 INIT_PARAM_DFLT(symbolfile, "file to read symbols from", ""),
249 INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0),
250 INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34),
251 INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10)
252
253END_INIT_SIM_OBJECT_PARAMS(AlphaSystem)
254
255CREATE_SIM_OBJECT(AlphaSystem)
| 215AlphaSystem *
216AlphaSystemParams::create()
|
256{
| 217{
|
257 AlphaSystem::Params *p = new AlphaSystem::Params;
258 p->name = getInstanceName();
259 p->boot_cpu_frequency = boot_cpu_frequency;
260 p->physmem = physmem;
261 p->mem_mode = mem_mode;
262 p->kernel_path = kernel;
263 p->console_path = console;
264 p->palcode = pal;
265 p->boot_osflags = boot_osflags;
266 p->init_param = init_param;
267 p->readfile = readfile;
268 p->symbolfile = symbolfile;
269 p->system_type = system_type;
270 p->system_rev = system_rev;
271 return new AlphaSystem(p);
| 218 return new AlphaSystem(this);
|
272}
| 219}
|
273
274REGISTER_SIM_OBJECT("AlphaSystem", AlphaSystem)
275
276
| |
| |