registers.hh (13611:c8b7847b4171) | registers.hh (13614:52c5311db96b) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 32 unchanged lines hidden (view full) --- 41namespace AlphaISA { 42 43using AlphaISAInst::MaxInstSrcRegs; 44using AlphaISAInst::MaxInstDestRegs; 45 46// Locked read/write flags are can't be detected by the ISA parser 47const int MaxMiscDestRegs = AlphaISAInst::MaxMiscDestRegs + 1; 48 | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 32 unchanged lines hidden (view full) --- 41namespace AlphaISA { 42 43using AlphaISAInst::MaxInstSrcRegs; 44using AlphaISAInst::MaxInstDestRegs; 45 46// Locked read/write flags are can't be detected by the ISA parser 47const int MaxMiscDestRegs = AlphaISAInst::MaxMiscDestRegs + 1; 48 |
49typedef RegVal IntReg; 50 51// floating point register file entry type 52typedef RegVal FloatReg; 53 54// control register file contents 55typedef RegVal MiscReg; 56 | |
57// dummy typedef since we don't have CC regs 58typedef uint8_t CCReg; 59 60// Not applicable to Alpha 61using VecElem = ::DummyVecElem; 62using VecReg = ::DummyVecReg; 63using ConstVecReg = ::DummyConstVecReg; 64using VecRegContainer = ::DummyVecRegContainer; --- 54 unchanged lines hidden --- | 49// dummy typedef since we don't have CC regs 50typedef uint8_t CCReg; 51 52// Not applicable to Alpha 53using VecElem = ::DummyVecElem; 54using VecReg = ::DummyVecReg; 55using ConstVecReg = ::DummyConstVecReg; 56using VecRegContainer = ::DummyVecRegContainer; --- 54 unchanged lines hidden --- |