registers.hh (6329:5d8b91875859) registers.hh (7649:a6a6177a5ffa)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_ALPHA_REGISTERS_HH__
32#define __ARCH_ALPHA_REGISTERS_HH__
33
34#include "arch/alpha/ipr.hh"
35#include "arch/alpha/max_inst_regs.hh"
36#include "base/types.hh"
37
38namespace AlphaISA {
39
40using AlphaISAInst::MaxInstSrcRegs;
41using AlphaISAInst::MaxInstDestRegs;
42
43typedef uint8_t RegIndex;
44typedef uint64_t IntReg;
45
46// floating point register file entry type
47typedef double FloatReg;
48typedef uint64_t FloatRegBits;
49
50// control register file contents
51typedef uint64_t MiscReg;
52
53union AnyReg
54{
55 IntReg intreg;
56 FloatReg fpreg;
57 MiscReg ctrlreg;
58};
59
60enum MiscRegIndex
61{
62 MISCREG_FPCR = NumInternalProcRegs,
63 MISCREG_UNIQ,
64 MISCREG_LOCKFLAG,
65 MISCREG_LOCKADDR,
66 MISCREG_INTR
67};
68
69// semantically meaningful register indices
70const RegIndex ZeroReg = 31; // architecturally meaningful
71// the rest of these depend on the ABI
72const RegIndex StackPointerReg = 30;
73const RegIndex GlobalPointerReg = 29;
74const RegIndex ProcedureValueReg = 27;
75const RegIndex ReturnAddressReg = 26;
76const RegIndex ReturnValueReg = 0;
77const RegIndex FramePointerReg = 15;
78
79const RegIndex SyscallNumReg = 0;
80const RegIndex FirstArgumentReg = 16;
81const RegIndex SyscallPseudoReturnReg = 20;
82const RegIndex SyscallSuccessReg = 19;
83
84const int NumIntArchRegs = 32;
85const int NumPALShadowRegs = 8;
86const int NumFloatArchRegs = 32;
87// @todo: Figure out what this number really should be.
88const int NumMiscArchRegs = 77;
89
90const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs;
91const int NumFloatRegs = NumFloatArchRegs;
92const int NumMiscRegs = NumMiscArchRegs;
93
94const int TotalNumRegs =
95 NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs;
96
97const int TotalDataRegs = NumIntRegs + NumFloatRegs;
98
99// These enumerate all the registers for dependence tracking.
100enum DependenceTags {
101 // 0..31 are the integer regs 0..31
102 // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
103 FP_Base_DepTag = 40,
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_ALPHA_REGISTERS_HH__
32#define __ARCH_ALPHA_REGISTERS_HH__
33
34#include "arch/alpha/ipr.hh"
35#include "arch/alpha/max_inst_regs.hh"
36#include "base/types.hh"
37
38namespace AlphaISA {
39
40using AlphaISAInst::MaxInstSrcRegs;
41using AlphaISAInst::MaxInstDestRegs;
42
43typedef uint8_t RegIndex;
44typedef uint64_t IntReg;
45
46// floating point register file entry type
47typedef double FloatReg;
48typedef uint64_t FloatRegBits;
49
50// control register file contents
51typedef uint64_t MiscReg;
52
53union AnyReg
54{
55 IntReg intreg;
56 FloatReg fpreg;
57 MiscReg ctrlreg;
58};
59
60enum MiscRegIndex
61{
62 MISCREG_FPCR = NumInternalProcRegs,
63 MISCREG_UNIQ,
64 MISCREG_LOCKFLAG,
65 MISCREG_LOCKADDR,
66 MISCREG_INTR
67};
68
69// semantically meaningful register indices
70const RegIndex ZeroReg = 31; // architecturally meaningful
71// the rest of these depend on the ABI
72const RegIndex StackPointerReg = 30;
73const RegIndex GlobalPointerReg = 29;
74const RegIndex ProcedureValueReg = 27;
75const RegIndex ReturnAddressReg = 26;
76const RegIndex ReturnValueReg = 0;
77const RegIndex FramePointerReg = 15;
78
79const RegIndex SyscallNumReg = 0;
80const RegIndex FirstArgumentReg = 16;
81const RegIndex SyscallPseudoReturnReg = 20;
82const RegIndex SyscallSuccessReg = 19;
83
84const int NumIntArchRegs = 32;
85const int NumPALShadowRegs = 8;
86const int NumFloatArchRegs = 32;
87// @todo: Figure out what this number really should be.
88const int NumMiscArchRegs = 77;
89
90const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs;
91const int NumFloatRegs = NumFloatArchRegs;
92const int NumMiscRegs = NumMiscArchRegs;
93
94const int TotalNumRegs =
95 NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs;
96
97const int TotalDataRegs = NumIntRegs + NumFloatRegs;
98
99// These enumerate all the registers for dependence tracking.
100enum DependenceTags {
101 // 0..31 are the integer regs 0..31
102 // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
103 FP_Base_DepTag = 40,
104 Ctrl_Base_DepTag = 72
104 Ctrl_Base_DepTag = 72,
105 Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs + NumInternalProcRegs
105};
106
107} // namespace AlphaISA
108
109#endif // __ARCH_ALPHA_REGFILE_HH__
106};
107
108} // namespace AlphaISA
109
110#endif // __ARCH_ALPHA_REGFILE_HH__