1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_ALPHA_REGISTERS_HH__ 32#define __ARCH_ALPHA_REGISTERS_HH__ 33 34#include "arch/alpha/generated/max_inst_regs.hh" 35#include "arch/alpha/ipr.hh" 36#include "arch/generic/types.hh"
| 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_ALPHA_REGISTERS_HH__ 32#define __ARCH_ALPHA_REGISTERS_HH__ 33 34#include "arch/alpha/generated/max_inst_regs.hh" 35#include "arch/alpha/ipr.hh" 36#include "arch/generic/types.hh"
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| 37#include "arch/generic/vec_pred_reg.hh"
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37#include "arch/generic/vec_reg.hh" 38#include "base/types.hh" 39 40namespace AlphaISA { 41 42using AlphaISAInst::MaxInstSrcRegs; 43using AlphaISAInst::MaxInstDestRegs; 44 45// Locked read/write flags are can't be detected by the ISA parser 46const int MaxMiscDestRegs = AlphaISAInst::MaxMiscDestRegs + 1; 47 48typedef RegVal IntReg; 49 50// floating point register file entry type 51typedef RegVal FloatRegBits; 52 53// control register file contents 54typedef RegVal MiscReg; 55 56// dummy typedef since we don't have CC regs 57typedef uint8_t CCReg; 58
| 38#include "arch/generic/vec_reg.hh" 39#include "base/types.hh" 40 41namespace AlphaISA { 42 43using AlphaISAInst::MaxInstSrcRegs; 44using AlphaISAInst::MaxInstDestRegs; 45 46// Locked read/write flags are can't be detected by the ISA parser 47const int MaxMiscDestRegs = AlphaISAInst::MaxMiscDestRegs + 1; 48 49typedef RegVal IntReg; 50 51// floating point register file entry type 52typedef RegVal FloatRegBits; 53 54// control register file contents 55typedef RegVal MiscReg; 56 57// dummy typedef since we don't have CC regs 58typedef uint8_t CCReg; 59
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59// dummy typedefs since we don't have vector regs 60constexpr unsigned NumVecElemPerVecReg = 2; 61using VecElem = uint32_t; 62using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>; 63using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>; 64using VecRegContainer = VecReg::Container; 65// This has to be one to prevent warnings that are treated as errors 66constexpr unsigned NumVecRegs = 1;
| 60// Not applicable to Alpha 61using VecElem = ::DummyVecElem; 62using VecReg = ::DummyVecReg; 63using ConstVecReg = ::DummyConstVecReg; 64using VecRegContainer = ::DummyVecRegContainer; 65constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg; 66constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
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67
| 67
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| 68// Not applicable to Alpha 69using VecPredReg = ::DummyVecPredReg; 70using ConstVecPredReg = ::DummyConstVecPredReg; 71using VecPredRegContainer = ::DummyVecPredRegContainer; 72constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits; 73constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr; 74
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68enum MiscRegIndex 69{ 70 MISCREG_FPCR = NumInternalProcRegs, 71 MISCREG_UNIQ, 72 MISCREG_LOCKFLAG, 73 MISCREG_LOCKADDR, 74 MISCREG_INTR, 75 NUM_MISCREGS 76}; 77 78// semantically meaningful register indices 79const RegIndex ZeroReg = 31; // architecturally meaningful 80// the rest of these depend on the ABI 81const RegIndex StackPointerReg = 30; 82const RegIndex GlobalPointerReg = 29; 83const RegIndex ProcedureValueReg = 27; 84const RegIndex ReturnAddressReg = 26; 85const RegIndex ReturnValueReg = 0; 86const RegIndex FramePointerReg = 15; 87 88const RegIndex SyscallNumReg = 0; 89const RegIndex FirstArgumentReg = 16; 90const RegIndex SyscallPseudoReturnReg = 20; 91const RegIndex SyscallSuccessReg = 19; 92 93const int NumIntArchRegs = 32; 94const int NumPALShadowRegs = 8; 95const int NumFloatArchRegs = 32; 96 97const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs; 98const int NumFloatRegs = NumFloatArchRegs;
| 75enum MiscRegIndex 76{ 77 MISCREG_FPCR = NumInternalProcRegs, 78 MISCREG_UNIQ, 79 MISCREG_LOCKFLAG, 80 MISCREG_LOCKADDR, 81 MISCREG_INTR, 82 NUM_MISCREGS 83}; 84 85// semantically meaningful register indices 86const RegIndex ZeroReg = 31; // architecturally meaningful 87// the rest of these depend on the ABI 88const RegIndex StackPointerReg = 30; 89const RegIndex GlobalPointerReg = 29; 90const RegIndex ProcedureValueReg = 27; 91const RegIndex ReturnAddressReg = 26; 92const RegIndex ReturnValueReg = 0; 93const RegIndex FramePointerReg = 15; 94 95const RegIndex SyscallNumReg = 0; 96const RegIndex FirstArgumentReg = 16; 97const RegIndex SyscallPseudoReturnReg = 20; 98const RegIndex SyscallSuccessReg = 19; 99 100const int NumIntArchRegs = 32; 101const int NumPALShadowRegs = 8; 102const int NumFloatArchRegs = 32; 103 104const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs; 105const int NumFloatRegs = NumFloatArchRegs;
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| 106const int NumVecRegs = 1; // Not applicable to Alpha 107 // (1 to prevent warnings) 108const int NumVecPredRegs = 1; // Not applicable to Alpha 109 // (1 to prevent warnings)
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99const int NumCCRegs = 0; 100const int NumMiscRegs = NUM_MISCREGS; 101 102const int TotalNumRegs = 103 NumIntRegs + NumFloatRegs + NumMiscRegs; 104 105} // namespace AlphaISA 106 107#endif // __ARCH_ALPHA_REGFILE_HH__
| 110const int NumCCRegs = 0; 111const int NumMiscRegs = NUM_MISCREGS; 112 113const int TotalNumRegs = 114 NumIntRegs + NumFloatRegs + NumMiscRegs; 115 116} // namespace AlphaISA 117 118#endif // __ARCH_ALPHA_REGFILE_HH__
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