process.cc (7701:324323fe947b) process.cc (7720:65d338a8dba4)
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 148 unchanged lines hidden (view full) ---

157 }
158
159 ThreadContext *tc = system->getThreadContext(contextIds[0]);
160
161 setSyscallArg(tc, 0, argc);
162 setSyscallArg(tc, 1, argv_array_base);
163 tc->setIntReg(StackPointerReg, stack_min);
164
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 148 unchanged lines hidden (view full) ---

157 }
158
159 ThreadContext *tc = system->getThreadContext(contextIds[0]);
160
161 setSyscallArg(tc, 0, argc);
162 setSyscallArg(tc, 1, argv_array_base);
163 tc->setIntReg(StackPointerReg, stack_min);
164
165 Addr prog_entry = objFile->entryPoint();
166 tc->setPC(prog_entry);
167 tc->setNextPC(prog_entry + sizeof(MachInst));
168
169 // MIPS/Sparc need NNPC for delay slot handling, while
170 // Alpha has no delay slots... However, CPU models
171 // cycle PCs by PC=NPC, NPC=NNPC, etc. so setting this
172 // here ensures CPU-Model Compatibility across board
173 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
165 tc->pcState(objFile->entryPoint());
174}
175
176void
177AlphaLiveProcess::setupASNReg()
178{
179 ThreadContext *tc = system->getThreadContext(contextIds[0]);
180 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
181}

--- 64 unchanged lines hidden --- 		166}
167
168void
169AlphaLiveProcess::setupASNReg()
170{
171 ThreadContext *tc = system->getThreadContext(contextIds[0]);
172 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
173}

--- 64 unchanged lines hidden ---