process.cc (6701:4842482e1bd1) process.cc (6820:2980bd04e6df)
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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170 // cycle PCs by PC=NPC, NPC=NNPC, etc. so setting this
171 // here ensures CPU-Model Compatibility across board
172 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
173}
174
175void
176AlphaLiveProcess::startup()
177{
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 161 unchanged lines hidden (view full) ---

170 // cycle PCs by PC=NPC, NPC=NNPC, etc. so setting this
171 // here ensures CPU-Model Compatibility across board
172 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
173}
174
175void
176AlphaLiveProcess::startup()
177{
178 if (checkpointRestored)
178 ThreadContext *tc = system->getThreadContext(contextIds[0]);
179 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
180
181 if (checkpointRestored) {
179 return;
182 return;
183 }
180
181 Process::startup();
182
183 argsInit(MachineBytes, VMPageSize);
184
184
185 Process::startup();
186
187 argsInit(MachineBytes, VMPageSize);
188
185 ThreadContext *tc = system->getThreadContext(contextIds[0]);
186 tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
187 //Operate in user mode
188 tc->setMiscRegNoEffect(IPR_ICM, 0x18);
189 //No super page mapping
190 tc->setMiscRegNoEffect(IPR_MCSR, 0);
189 tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
190 //Operate in user mode
191 tc->setMiscRegNoEffect(IPR_ICM, 0x18);
192 //No super page mapping
193 tc->setMiscRegNoEffect(IPR_MCSR, 0);
191 //Set this to 0 for now, but it should be unique for each process
192 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
193}
194
195AlphaISA::IntReg
196AlphaLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
197{
198 assert(i < 6);
199 return tc->readIntReg(FirstArgumentReg + i++);
200}

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195
196AlphaISA::IntReg
197AlphaLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
198{
199 assert(i < 6);
200 return tc->readIntReg(FirstArgumentReg + i++);
201}

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