process.cc (5771:f58d82cb8b7f) | process.cc (5958:2d9737bf3c2f) |
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1/* 2 * Copyright (c) 2003-2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 28 unchanged lines hidden (view full) --- 37#include "cpu/thread_context.hh" 38#include "mem/page_table.hh" 39#include "sim/process_impl.hh" 40#include "sim/system.hh" 41 42using namespace AlphaISA; 43using namespace std; 44 | 1/* 2 * Copyright (c) 2003-2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 28 unchanged lines hidden (view full) --- 37#include "cpu/thread_context.hh" 38#include "mem/page_table.hh" 39#include "sim/process_impl.hh" 40#include "sim/system.hh" 41 42using namespace AlphaISA; 43using namespace std; 44 |
45static const int SyscallSuccessReg = 19; 46 |
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45AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params, 46 ObjectFile *objFile) 47 : LiveProcess(params, objFile) 48{ 49 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 50 brk_point = roundUp(brk_point, VMPageSize); 51 52 // Set up stack. On Alpha, stack goes below text section. This --- 98 unchanged lines hidden (view full) --- 151 for(int x = 0; x < auxv.size(); x++) 152 { 153 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 154 (uint8_t*)&(auxv[x].a_type), intSize); 155 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 156 (uint8_t*)&(auxv[x].a_val), intSize); 157 } 158 | 47AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params, 48 ObjectFile *objFile) 49 : LiveProcess(params, objFile) 50{ 51 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 52 brk_point = roundUp(brk_point, VMPageSize); 53 54 // Set up stack. On Alpha, stack goes below text section. This --- 98 unchanged lines hidden (view full) --- 153 for(int x = 0; x < auxv.size(); x++) 154 { 155 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 156 (uint8_t*)&(auxv[x].a_type), intSize); 157 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 158 (uint8_t*)&(auxv[x].a_val), intSize); 159 } 160 |
159 assert(NumArgumentRegs >= 2); 160 | |
161 ThreadContext *tc = system->getThreadContext(contextIds[0]); 162 | 161 ThreadContext *tc = system->getThreadContext(contextIds[0]); 162 |
163 tc->setIntReg(ArgumentReg[0], argc); 164 tc->setIntReg(ArgumentReg[1], argv_array_base); | 163 setSyscallArg(tc, 0, argc); 164 setSyscallArg(tc, 1, argv_array_base); |
165 tc->setIntReg(StackPointerReg, stack_min); 166 167 Addr prog_entry = objFile->entryPoint(); 168 tc->setPC(prog_entry); 169 tc->setNextPC(prog_entry + sizeof(MachInst)); 170 171#if THE_ISA != ALPHA_ISA //e.g. MIPS or Sparc 172 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst))); --- 17 unchanged lines hidden (view full) --- 190 //Operate in user mode 191 tc->setMiscRegNoEffect(IPR_ICM, 0x18); 192 //No super page mapping 193 tc->setMiscRegNoEffect(IPR_MCSR, 0); 194 //Set this to 0 for now, but it should be unique for each process 195 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57); 196} 197 | 165 tc->setIntReg(StackPointerReg, stack_min); 166 167 Addr prog_entry = objFile->entryPoint(); 168 tc->setPC(prog_entry); 169 tc->setNextPC(prog_entry + sizeof(MachInst)); 170 171#if THE_ISA != ALPHA_ISA //e.g. MIPS or Sparc 172 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst))); --- 17 unchanged lines hidden (view full) --- 190 //Operate in user mode 191 tc->setMiscRegNoEffect(IPR_ICM, 0x18); 192 //No super page mapping 193 tc->setMiscRegNoEffect(IPR_MCSR, 0); 194 //Set this to 0 for now, but it should be unique for each process 195 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57); 196} 197 |
198AlphaISA::IntReg 199AlphaLiveProcess::getSyscallArg(ThreadContext *tc, int i) 200{ 201 assert(i < 6); 202 return tc->readIntReg(FirstArgumentReg + i); 203} 204 205void 206AlphaLiveProcess::setSyscallArg(ThreadContext *tc, 207 int i, AlphaISA::IntReg val) 208{ 209 assert(i < 6); 210 tc->setIntReg(FirstArgumentReg + i, val); 211} 212 213void 214AlphaLiveProcess::setSyscallReturn(ThreadContext *tc, 215 SyscallReturn return_value) 216{ 217 // check for error condition. Alpha syscall convention is to 218 // indicate success/failure in reg a3 (r19) and put the 219 // return value itself in the standard return value reg (v0). 220 if (return_value.successful()) { 221 // no error 222 tc->setIntReg(SyscallSuccessReg, 0); 223 tc->setIntReg(ReturnValueReg, return_value.value()); 224 } else { 225 // got an error, return details 226 tc->setIntReg(SyscallSuccessReg, (IntReg)-1); 227 tc->setIntReg(ReturnValueReg, -return_value.value()); 228 } 229} |
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