1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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37#include "cpu/thread_context.hh"
38#include "mem/page_table.hh"
39#include "sim/process_impl.hh"
40#include "sim/system.hh"
41
42using namespace AlphaISA;
43using namespace std;
44
45AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params,
46 ObjectFile *objFile)
47 : LiveProcess(params, objFile)
48{
49 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
50 brk_point = roundUp(brk_point, VMPageSize);
51
52 // Set up stack. On Alpha, stack goes below text section. This

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151 for(int x = 0; x < auxv.size(); x++)
152 {
153 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
154 (uint8_t*)&(auxv[x].a_type), intSize);
155 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
156 (uint8_t*)&(auxv[x].a_val), intSize);
157 }
158
159 assert(NumArgumentRegs >= 2);
160
161 ThreadContext *tc = system->getThreadContext(contextIds[0]);
162
163 tc->setIntReg(ArgumentReg[0], argc);
164 tc->setIntReg(ArgumentReg[1], argv_array_base);
165 tc->setIntReg(StackPointerReg, stack_min);
166
167 Addr prog_entry = objFile->entryPoint();
168 tc->setPC(prog_entry);
169 tc->setNextPC(prog_entry + sizeof(MachInst));
170
171#if THE_ISA != ALPHA_ISA //e.g. MIPS or Sparc
172 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));

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190 //Operate in user mode
191 tc->setMiscRegNoEffect(IPR_ICM, 0x18);
192 //No super page mapping
193 tc->setMiscRegNoEffect(IPR_MCSR, 0);
194 //Set this to 0 for now, but it should be unique for each process
195 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
196}
197