1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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27 *
28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
32#include "arch/alpha/isa_traits.hh"
33#include "arch/alpha/process.hh"
34#include "base/loader/object_file.hh"
35#include "base/misc.hh"
36#include "cpu/thread_context.hh"
37#include "sim/system.hh"
38
39using namespace AlphaISA;
40using namespace std;
41
42AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params,
43 ObjectFile *objFile)
44 : LiveProcess(params, objFile)

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55 mmap_start = mmap_end = 0x10000;
56
57 // Set pointer for next thread stack. Reserve 8M for main stack.
58 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
59
60}
61
62void
63AlphaLiveProcess::startup()
64{
65 if (checkpointRestored)
66 return;
67
68 argsInit(MachineBytes, VMPageSize);
69
70 ThreadContext *tc = system->getThreadContext(contextIds[0]);
71 tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
72 //Operate in user mode
73 tc->setMiscRegNoEffect(IPR_ICM, 0x18);
74 //No super page mapping
75 tc->setMiscRegNoEffect(IPR_MCSR, 0);
76 //Set this to 0 for now, but it should be unique for each process
77 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
78}
79