1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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41#include "sim/byteswap.hh"
42#include "sim/process_impl.hh"
43#include "sim/syscall_return.hh"
44#include "sim/system.hh"
45
46using namespace AlphaISA;
47using namespace std;
48
49AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params,
50 ObjectFile *objFile)
51 : LiveProcess(params, objFile)
52{
53 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
54 brk_point = roundUp(brk_point, PageBytes);
55
56 // Set up stack. On Alpha, stack goes below text section. This
57 // code should get moved to some architecture-specific spot.
58 stack_base = objFile->textBase() - (409600+4096);
59
60 // Set up region for mmaps. Tru64 seems to start just above 0 and
61 // grow up from there.
62 mmap_end = 0x10000;
63
64 // Set pointer for next thread stack. Reserve 8M for main stack.
65 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
66
67}
68
69void
70AlphaLiveProcess::argsInit(int intSize, int pageSize)
71{
72 // Patch the ld_bias for dynamic executables.
73 updateBias();
74
75 objFile->loadSections(initVirtMem);
76
77 typedef AuxVector<uint64_t> auxv_t;
78 std::vector<auxv_t> auxv;

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171 setSyscallArg(tc, 0, argc);
172 setSyscallArg(tc, 1, argv_array_base);
173 tc->setIntReg(StackPointerReg, stack_min);
174
175 tc->pcState(getStartPC());
176}
177
178void
179AlphaLiveProcess::setupASNReg()
180{
181 ThreadContext *tc = system->getThreadContext(contextIds[0]);
182 tc->setMiscRegNoEffect(IPR_DTB_ASN, _pid << 57);
183}
184
185
186void
187AlphaLiveProcess::loadState(CheckpointIn &cp)
188{
189 LiveProcess::loadState(cp);
190 // need to set up ASN after unserialization since _pid value may
191 // come from checkpoint
192 setupASNReg();
193}
194
195
196void
197AlphaLiveProcess::initState()
198{
199 // need to set up ASN before further initialization since init
200 // will involve writing to virtual memory addresses
201 setupASNReg();
202
203 LiveProcess::initState();
204
205 argsInit(MachineBytes, PageBytes);
206
207 ThreadContext *tc = system->getThreadContext(contextIds[0]);
208 tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
209 //Operate in user mode
210 tc->setMiscRegNoEffect(IPR_ICM, mode_user << 3);
211 tc->setMiscRegNoEffect(IPR_DTB_CM, mode_user << 3);
212 //No super page mapping
213 tc->setMiscRegNoEffect(IPR_MCSR, 0);
214}
215
216AlphaISA::IntReg
217AlphaLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
218{
219 assert(i < 6);
220 return tc->readIntReg(FirstArgumentReg + i++);
221}
222
223void
224AlphaLiveProcess::setSyscallArg(ThreadContext *tc,
225 int i, AlphaISA::IntReg val)
226{
227 assert(i < 6);
228 tc->setIntReg(FirstArgumentReg + i, val);
229}
230
231void
232AlphaLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
233{
234 // check for error condition. Alpha syscall convention is to
235 // indicate success/failure in reg a3 (r19) and put the
236 // return value itself in the standard return value reg (v0).
237 if (sysret.successful()) {
238 // no error
239 tc->setIntReg(SyscallSuccessReg, 0);
240 tc->setIntReg(ReturnValueReg, sysret.returnValue());
241 } else {
242 // got an error, return details
243 tc->setIntReg(SyscallSuccessReg, (IntReg)-1);
244 tc->setIntReg(ReturnValueReg, sysret.errnoValue());
245 }
246}