pagetable.hh (10558:426665ec11a9) pagetable.hh (10905:a6ca6831e775)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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85 bool _fow() const { return (entry >> 2) & 0x1; }
86 bool _for() const { return (entry >> 1) & 0x1; }
87 bool valid() const { return (entry >> 0) & 0x1; }
88
89 Addr paddr() const { return _pfn() << PageShift; }
90};
91
92// ITB/DTB table entry
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 76 unchanged lines hidden (view full) ---

85 bool _fow() const { return (entry >> 2) & 0x1; }
86 bool _for() const { return (entry >> 1) & 0x1; }
87 bool valid() const { return (entry >> 0) & 0x1; }
88
89 Addr paddr() const { return _pfn() << PageShift; }
90};
91
92// ITB/DTB table entry
93struct TlbEntry
93struct TlbEntry : public Serializable
94{
95 Addr tag; // virtual page number tag
96 Addr ppn; // physical page number
97 uint8_t xre; // read permissions - VMEM_PERM_* mask
98 uint8_t xwe; // write permissions - VMEM_PERM_* mask
99 uint8_t asn; // address space number
100 bool asma; // address space match
101 bool fonr; // fault on read

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119 fonw = false;
120 valid = true;
121 if (uncacheable || read_only)
122 warn("Alpha TlbEntry does not support uncacheable"
123 " or read-only mappings\n");
124 }
125
126 TlbEntry()
94{
95 Addr tag; // virtual page number tag
96 Addr ppn; // physical page number
97 uint8_t xre; // read permissions - VMEM_PERM_* mask
98 uint8_t xwe; // write permissions - VMEM_PERM_* mask
99 uint8_t asn; // address space number
100 bool asma; // address space match
101 bool fonr; // fault on read

--- 17 unchanged lines hidden (view full) ---

119 fonw = false;
120 valid = true;
121 if (uncacheable || read_only)
122 warn("Alpha TlbEntry does not support uncacheable"
123 " or read-only mappings\n");
124 }
125
126 TlbEntry()
127 {}
127 : tag(0), ppn(0), xre(0), xwe(0), asn(0),
128 asma(false), fonr(0), fonw(0), valid(0)
129 {
130 }
128
129 void
130 updateVaddr(Addr new_vaddr)
131 {
132 VAddr vaddr(new_vaddr);
133 tag = vaddr.vpn();
134 }
135
136 Addr
137 pageStart()
138 {
139 return ppn << PageShift;
140 }
141
131
132 void
133 updateVaddr(Addr new_vaddr)
134 {
135 VAddr vaddr(new_vaddr);
136 tag = vaddr.vpn();
137 }
138
139 Addr
140 pageStart()
141 {
142 return ppn << PageShift;
143 }
144
142 void serialize(std::ostream &os);
143 void unserialize(Checkpoint *cp, const std::string &section);
145 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
146 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
144};
145
146} // namespace AlphaISA
147
148#endif // __ARCH_ALPHA_PAGETABLE_H__
149
147};
148
149} // namespace AlphaISA
150
151#endif // __ARCH_ALPHA_PAGETABLE_H__
152