1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 35 unchanged lines hidden (view full) --- 44 * after the address translation has been performed to allow the ISA 45 * to do these manipulations based on the physical address. 46 */ 47 48#include "arch/alpha/miscregfile.hh" 49#include "base/misc.hh" 50#include "mem/request.hh" 51 |
52namespace AlphaISA { |
53 |
54template <class XC> 55inline void 56handleLockedRead(XC *xc, Request *req) 57{ 58 xc->setMiscRegNoEffect(MISCREG_LOCKADDR, req->getPaddr() & ~0xf); 59 xc->setMiscRegNoEffect(MISCREG_LOCKFLAG, true); 60} 61 --- 31 unchanged lines hidden (view full) --- 93 // store conditional failed already, so don't issue it to mem 94 return false; 95 } 96 } 97 98 return true; 99} 100 |
101} // namespace AlphaISA 102 |
103#endif // __ARCH_ALPHA_LOCKED_MEM_HH__ |