1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright

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42 * not accessible from the ISA description, only from the CPU model.
43 * Thus the CPU is responsible for calling back to the ISA (here)
44 * after the address translation has been performed to allow the ISA
45 * to do these manipulations based on the physical address.
46 */
47
48#include "arch/alpha/registers.hh"
49#include "base/misc.hh"
50#include "mem/request.hh"
51
52namespace AlphaISA {
53
54template <class XC>
55inline void
56handleLockedRead(XC *xc, Request *req)
57{
58 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr() & ~0xf);
59 xc->setMiscReg(MISCREG_LOCKFLAG, true);
60}
61
62
63template <class XC>

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