isa_traits.hh (4772:f08370a81812) isa_traits.hh (4997:e7380529bd2d)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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58 // Alpha Does NOT have a delay slot
59 #define ISA_HAS_DELAY_SLOT 0
60
61 const Addr PageShift = 13;
62 const Addr PageBytes = ULL(1) << PageShift;
63 const Addr PageMask = ~(PageBytes - 1);
64 const Addr PageOffset = PageBytes - 1;
65
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 49 unchanged lines hidden (view full) ---

58 // Alpha Does NOT have a delay slot
59 #define ISA_HAS_DELAY_SLOT 0
60
61 const Addr PageShift = 13;
62 const Addr PageBytes = ULL(1) << PageShift;
63 const Addr PageMask = ~(PageBytes - 1);
64 const Addr PageOffset = PageBytes - 1;
65
66#if FULL_SYSTEM
67
68 ////////////////////////////////////////////////////////////////////////
69 //
70 // Translation stuff
71 //
72
66
67 ////////////////////////////////////////////////////////////////////////
68 //
69 // Translation stuff
70 //
71
73 const Addr PteShift = 3;
72 const Addr PteShift = 3;
74 const Addr NPtePageShift = PageShift - PteShift;
75 const Addr NPtePage = ULL(1) << NPtePageShift;
76 const Addr PteMask = NPtePage - 1;
77
78 // User Virtual
79 const Addr USegBase = ULL(0x0);
80 const Addr USegEnd = ULL(0x000003ffffffffff);
81
82 // Kernel Direct Mapped
83 const Addr K0SegBase = ULL(0xfffffc0000000000);
84 const Addr K0SegEnd = ULL(0xfffffdffffffffff);
85
86 // Kernel Virtual
87 const Addr K1SegBase = ULL(0xfffffe0000000000);
88 const Addr K1SegEnd = ULL(0xffffffffffffffff);
89
90 // For loading... XXX This maybe could be USegEnd?? --ali
91 const Addr LoadAddrMask = ULL(0xffffffffff);
92
73 const Addr NPtePageShift = PageShift - PteShift;
74 const Addr NPtePage = ULL(1) << NPtePageShift;
75 const Addr PteMask = NPtePage - 1;
76
77 // User Virtual
78 const Addr USegBase = ULL(0x0);
79 const Addr USegEnd = ULL(0x000003ffffffffff);
80
81 // Kernel Direct Mapped
82 const Addr K0SegBase = ULL(0xfffffc0000000000);
83 const Addr K0SegEnd = ULL(0xfffffdffffffffff);
84
85 // Kernel Virtual
86 const Addr K1SegBase = ULL(0xfffffe0000000000);
87 const Addr K1SegEnd = ULL(0xffffffffffffffff);
88
89 // For loading... XXX This maybe could be USegEnd?? --ali
90 const Addr LoadAddrMask = ULL(0xffffffffff);
91
92#if FULL_SYSTEM
93
93 ////////////////////////////////////////////////////////////////////////
94 //
95 // Interrupt levels
96 //
97 enum InterruptLevels
98 {
99 INTLEVEL_SOFTWARE_MIN = 4,
100 INTLEVEL_SOFTWARE_MAX = 19,

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109 INTLEVEL_IRQ2 = 22,
110 INTLEVEL_IRQ3 = 23,
111
112 INTLEVEL_SERIAL = 33,
113
114 NumInterruptLevels = INTLEVEL_EXTERNAL_MAX
115 };
116
94 ////////////////////////////////////////////////////////////////////////
95 //
96 // Interrupt levels
97 //
98 enum InterruptLevels
99 {
100 INTLEVEL_SOFTWARE_MIN = 4,
101 INTLEVEL_SOFTWARE_MAX = 19,

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110 INTLEVEL_IRQ2 = 22,
111 INTLEVEL_IRQ3 = 23,
112
113 INTLEVEL_SERIAL = 33,
114
115 NumInterruptLevels = INTLEVEL_EXTERNAL_MAX
116 };
117
118#endif
119
117 // EV5 modes
118 enum mode_type
119 {
120 mode_kernel = 0, // kernel
121 mode_executive = 1, // executive (unused by unix)
122 mode_supervisor = 2, // supervisor (unused by unix)
123 mode_user = 3, // user mode
124 mode_number // number of modes
125 };
126
120 // EV5 modes
121 enum mode_type
122 {
123 mode_kernel = 0, // kernel
124 mode_executive = 1, // executive (unused by unix)
125 mode_supervisor = 2, // supervisor (unused by unix)
126 mode_user = 3, // user mode
127 mode_number // number of modes
128 };
129
127#endif
128
129 // Constants Related to the number of registers
130
131 const int NumIntArchRegs = 32;
132 const int NumPALShadowRegs = 8;
133 const int NumFloatArchRegs = 32;
134 // @todo: Figure out what this number really should be.
135 const int NumMiscArchRegs = 77;
136

--- 47 unchanged lines hidden --- 		130 // Constants Related to the number of registers
131
132 const int NumIntArchRegs = 32;
133 const int NumPALShadowRegs = 8;
134 const int NumFloatArchRegs = 32;
135 // @todo: Figure out what this number really should be.
136 const int NumMiscArchRegs = 77;
137

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