isa_traits.hh (3964:3a843f30940e) | isa_traits.hh (4772:f08370a81812) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 142 unchanged lines hidden (view full) --- 151 const int ZeroReg = 31; // architecturally meaningful 152 // the rest of these depend on the ABI 153 const int StackPointerReg = 30; 154 const int GlobalPointerReg = 29; 155 const int ProcedureValueReg = 27; 156 const int ReturnAddressReg = 26; 157 const int ReturnValueReg = 0; 158 const int FramePointerReg = 15; | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 142 unchanged lines hidden (view full) --- 151 const int ZeroReg = 31; // architecturally meaningful 152 // the rest of these depend on the ABI 153 const int StackPointerReg = 30; 154 const int GlobalPointerReg = 29; 155 const int ProcedureValueReg = 27; 156 const int ReturnAddressReg = 26; 157 const int ReturnValueReg = 0; 158 const int FramePointerReg = 15; |
159 const int ArgumentReg0 = 16; 160 const int ArgumentReg1 = 17; 161 const int ArgumentReg2 = 18; 162 const int ArgumentReg3 = 19; 163 const int ArgumentReg4 = 20; 164 const int ArgumentReg5 = 21; | 159 160 const int ArgumentReg[] = {16, 17, 18, 19, 20, 21}; 161 const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); 162 |
165 const int SyscallNumReg = ReturnValueReg; | 163 const int SyscallNumReg = ReturnValueReg; |
166 const int SyscallPseudoReturnReg = ArgumentReg4; | 164 const int SyscallPseudoReturnReg = ArgumentReg[4]; |
167 const int SyscallSuccessReg = 19; 168 169 const int LogVMPageSize = 13; // 8K bytes 170 const int VMPageSize = (1 << LogVMPageSize); 171 172 const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned 173 174 const int MachineBytes = 8; 175 const int WordBytes = 4; 176 const int HalfwordBytes = 2; 177 const int ByteBytes = 1; 178 179 // return a no-op instruction... used for instruction fetch faults 180 // Alpha UNOP (ldq_u r31,0(r0)) 181 const ExtMachInst NoopMachInst = 0x2ffe0000; 182 183}; 184 185#endif // __ARCH_ALPHA_ISA_TRAITS_HH__ | 165 const int SyscallSuccessReg = 19; 166 167 const int LogVMPageSize = 13; // 8K bytes 168 const int VMPageSize = (1 << LogVMPageSize); 169 170 const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned 171 172 const int MachineBytes = 8; 173 const int WordBytes = 4; 174 const int HalfwordBytes = 2; 175 const int ByteBytes = 1; 176 177 // return a no-op instruction... used for instruction fetch faults 178 // Alpha UNOP (ldq_u r31,0(r0)) 179 const ExtMachInst NoopMachInst = 0x2ffe0000; 180 181}; 182 183#endif // __ARCH_ALPHA_ISA_TRAITS_HH__ |