isa_traits.hh (3586:c5cc95fc5a61) isa_traits.hh (3591:5c36532efd3c)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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109 INTLEVEL_IRQ2 = 22,
110 INTLEVEL_IRQ3 = 23,
111
112 INTLEVEL_SERIAL = 33,
113
114 NumInterruptLevels = INTLEVEL_EXTERNAL_MAX
115 };
116
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 100 unchanged lines hidden (view full) ---

109 INTLEVEL_IRQ2 = 22,
110 INTLEVEL_IRQ3 = 23,
111
112 INTLEVEL_SERIAL = 33,
113
114 NumInterruptLevels = INTLEVEL_EXTERNAL_MAX
115 };
116
117
118 // EV5 modes
119 enum mode_type
120 {
121 mode_kernel = 0, // kernel
122 mode_executive = 1, // executive (unused by unix)
123 mode_supervisor = 2, // supervisor (unused by unix)
124 mode_user = 3, // user mode
125 mode_number // number of modes

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176 const int WordBytes = 4;
177 const int HalfwordBytes = 2;
178 const int ByteBytes = 1;
179
180 // return a no-op instruction... used for instruction fetch faults
181 // Alpha UNOP (ldq_u r31,0(r0))
182 const ExtMachInst NoopMachInst = 0x2ffe0000;
183
117 // EV5 modes
118 enum mode_type
119 {
120 mode_kernel = 0, // kernel
121 mode_executive = 1, // executive (unused by unix)
122 mode_supervisor = 2, // supervisor (unused by unix)
123 mode_user = 3, // user mode
124 mode_number // number of modes

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175 const int WordBytes = 4;
176 const int HalfwordBytes = 2;
177 const int ByteBytes = 1;
178
179 // return a no-op instruction... used for instruction fetch faults
180 // Alpha UNOP (ldq_u r31,0(r0))
181 const ExtMachInst NoopMachInst = 0x2ffe0000;
182
184 // redirected register map, really only used for the full system case.
185 extern const int reg_redir[NumIntRegs];
186
187};
188
189#endif // __ARCH_ALPHA_ISA_TRAITS_HH__
183};
184
185#endif // __ARCH_ALPHA_ISA_TRAITS_HH__