isa_traits.hh (3457:7479ebe49444) isa_traits.hh (3586:c5cc95fc5a61)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 36 unchanged lines hidden (view full) ---

45{
46 using namespace LittleEndianGuest;
47
48 // These enumerate all the registers for dependence tracking.
49 enum DependenceTags {
50 // 0..31 are the integer regs 0..31
51 // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
52 FP_Base_DepTag = 40,
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 36 unchanged lines hidden (view full) ---

45{
46 using namespace LittleEndianGuest;
47
48 // These enumerate all the registers for dependence tracking.
49 enum DependenceTags {
50 // 0..31 are the integer regs 0..31
51 // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
52 FP_Base_DepTag = 40,
53 Ctrl_Base_DepTag = 72,
54 Fpcr_DepTag = 72, // floating point control register
55 Uniq_DepTag = 73,
56 Lock_Flag_DepTag = 74,
57 Lock_Addr_DepTag = 75,
58 Intr_Flag_DepTag = 76,
59 IPR_Base_DepTag = 77
53 Ctrl_Base_DepTag = 72
60 };
61
62 StaticInstPtr decodeInst(ExtMachInst);
63
64 // Alpha Does NOT have a delay slot
65 #define ISA_HAS_DELAY_SLOT 0
66
67 const Addr PageShift = 13;

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55
56 StaticInstPtr decodeInst(ExtMachInst);
57
58 // Alpha Does NOT have a delay slot
59 #define ISA_HAS_DELAY_SLOT 0
60
61 const Addr PageShift = 13;

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