isa_traits.hh (3126:756092c6383c) isa_traits.hh (3454:26850ac19a39)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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49 // 0..31 are the integer regs 0..31
50 // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
51 FP_Base_DepTag = 40,
52 Ctrl_Base_DepTag = 72,
53 Fpcr_DepTag = 72, // floating point control register
54 Uniq_DepTag = 73,
55 Lock_Flag_DepTag = 74,
56 Lock_Addr_DepTag = 75,
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 40 unchanged lines hidden (view full) ---

49 // 0..31 are the integer regs 0..31
50 // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
51 FP_Base_DepTag = 40,
52 Ctrl_Base_DepTag = 72,
53 Fpcr_DepTag = 72, // floating point control register
54 Uniq_DepTag = 73,
55 Lock_Flag_DepTag = 74,
56 Lock_Addr_DepTag = 75,
57 IPR_Base_DepTag = 76
57 Intr_Flag_DepTag = 76,
58 IPR_Base_DepTag = 77
58 };
59
60 StaticInstPtr decodeInst(ExtMachInst);
61
62 // Alpha Does NOT have a delay slot
63 #define ISA_HAS_DELAY_SLOT 0
64
65 const Addr PageShift = 13;

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60
61 StaticInstPtr decodeInst(ExtMachInst);
62
63 // Alpha Does NOT have a delay slot
64 #define ISA_HAS_DELAY_SLOT 0
65
66 const Addr PageShift = 13;

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