1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 * Gabe Black
30 */
31
32#ifndef __ARCH_ALPHA_ISA_TRAITS_HH__
33#define __ARCH_ALPHA_ISA_TRAITS_HH__
34
35namespace LittleEndianGuest {}
36
37#include "arch/alpha/types.hh"
38#include "base/types.hh"
39#include "cpu/static_inst_fwd.hh"
40
41namespace AlphaISA {
42
43using namespace LittleEndianGuest;
44

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124
125// return a no-op instruction... used for instruction fetch faults
126// Alpha UNOP (ldq_u r31,0(r0))
127const ExtMachInst NoopMachInst = 0x2ffe0000;
128
129// Memory accesses cannot be unaligned
130const bool HasUnalignedMemAcc = false;
131
132} // namespace AlphaISA
133
134#endif // __ARCH_ALPHA_ISA_TRAITS_HH__