1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2005 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright 9// notice, this list of conditions and the following disclaimer; 10// redistributions in binary form must reproduce the above copyright 11// notice, this list of conditions and the following disclaimer in the 12// documentation and/or other materials provided with the distribution; 13// neither the name of the copyright holders nor the names of its 14// contributors may be used to endorse or promote products derived from 15// this software without specific prior written permission. 16// 17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28// 29// Authors: Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// PAL calls & PAL-specific instructions 34// 35 36output header {{ 37 /** 38 * Base class for emulated call_pal calls (used only in 39 * non-full-system mode). 40 */ 41 class EmulatedCallPal : public AlphaStaticInst 42 { 43 protected: 44 45 /// Constructor. 46 EmulatedCallPal(const char *mnem, ExtMachInst _machInst, 47 OpClass __opClass) 48 : AlphaStaticInst(mnem, _machInst, __opClass) 49 { 50 } 51 52 std::string 53 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 54 }; 55}}; 56 57output decoder {{ 58 std::string 59 EmulatedCallPal::generateDisassembly(Addr pc, 60 const SymbolTable *symtab) const 61 { 62#ifdef SS_COMPATIBLE_DISASSEMBLY 63 return csprintf("%s %s", "call_pal", mnemonic); 64#else 65 return csprintf("%-10s %s", "call_pal", mnemonic); 66#endif 67 } 68}}; 69 70def format EmulatedCallPal(code, *flags) {{
| 1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2005 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright 9// notice, this list of conditions and the following disclaimer; 10// redistributions in binary form must reproduce the above copyright 11// notice, this list of conditions and the following disclaimer in the 12// documentation and/or other materials provided with the distribution; 13// neither the name of the copyright holders nor the names of its 14// contributors may be used to endorse or promote products derived from 15// this software without specific prior written permission. 16// 17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28// 29// Authors: Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// PAL calls & PAL-specific instructions 34// 35 36output header {{ 37 /** 38 * Base class for emulated call_pal calls (used only in 39 * non-full-system mode). 40 */ 41 class EmulatedCallPal : public AlphaStaticInst 42 { 43 protected: 44 45 /// Constructor. 46 EmulatedCallPal(const char *mnem, ExtMachInst _machInst, 47 OpClass __opClass) 48 : AlphaStaticInst(mnem, _machInst, __opClass) 49 { 50 } 51 52 std::string 53 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 54 }; 55}}; 56 57output decoder {{ 58 std::string 59 EmulatedCallPal::generateDisassembly(Addr pc, 60 const SymbolTable *symtab) const 61 { 62#ifdef SS_COMPATIBLE_DISASSEMBLY 63 return csprintf("%s %s", "call_pal", mnemonic); 64#else 65 return csprintf("%-10s %s", "call_pal", mnemonic); 66#endif 67 } 68}}; 69 70def format EmulatedCallPal(code, *flags) {{
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135 header_output = BasicDeclare.subst(iop) 136 decoder_output = BasicConstructor.subst(iop) 137 decode_block = BasicDecode.subst(iop) 138 exec_output = BasicExecute.subst(iop) 139}}; 140 141//////////////////////////////////////////////////////////////////// 142// 143// hw_ld, hw_st 144// 145 146output header {{ 147 /** 148 * Base class for hw_ld and hw_st. 149 */ 150 class HwLoadStore : public Memory 151 { 152 protected: 153 154 /// Displacement for EA calculation (signed). 155 int16_t disp; 156 157 /// Constructor 158 HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 159 StaticInstPtr _eaCompPtr = nullStaticInstPtr, 160 StaticInstPtr _memAccPtr = nullStaticInstPtr); 161 162 std::string 163 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 164 }; 165}}; 166 167 168output decoder {{ 169 inline 170 HwLoadStore::HwLoadStore(const char *mnem, ExtMachInst _machInst, 171 OpClass __opClass, 172 StaticInstPtr _eaCompPtr, 173 StaticInstPtr _memAccPtr) 174 : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr), 175 disp(HW_LDST_DISP) 176 { 177 memAccessFlags = 0; 178 if (HW_LDST_PHYS) memAccessFlags |= PHYSICAL; 179 if (HW_LDST_ALT) memAccessFlags |= ALTMODE; 180 if (HW_LDST_VPTE) memAccessFlags |= VPTE; 181 if (HW_LDST_LOCK) memAccessFlags |= LOCKED; 182 } 183 184 std::string 185 HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) const 186 { 187#ifdef SS_COMPATIBLE_DISASSEMBLY 188 return csprintf("%-10s r%d,%d(r%d)", mnemonic, RA, disp, RB); 189#else 190 // HW_LDST_LOCK and HW_LDST_COND are the same bit. 191 const char *lock_str = 192 (HW_LDST_LOCK) ? (flags[IsLoad] ? ",LOCK" : ",COND") : ""; 193 194 return csprintf("%-10s r%d,%d(r%d)%s%s%s%s%s", 195 mnemonic, RA, disp, RB, 196 HW_LDST_PHYS ? ",PHYS" : "", 197 HW_LDST_ALT ? ",ALT" : "", 198 HW_LDST_QUAD ? ",QUAD" : "", 199 HW_LDST_VPTE ? ",VPTE" : "", 200 lock_str); 201#endif 202 } 203}}; 204 205def format HwLoad(ea_code, memacc_code, class_ext, *flags) {{ 206 (header_output, decoder_output, decode_block, exec_output) = \ 207 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 208 mem_flags = [], inst_flags = flags, 209 base_class = 'HwLoadStore', exec_template_base = 'Load') 210}}; 211 212 213def format HwStore(ea_code, memacc_code, class_ext, *flags) {{ 214 (header_output, decoder_output, decode_block, exec_output) = \ 215 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 216 mem_flags = [], inst_flags = flags, 217 base_class = 'HwLoadStore', exec_template_base = 'Store') 218}}; 219 220 221def format HwStoreCond(ea_code, memacc_code, postacc_code, class_ext, 222 *flags) {{ 223 (header_output, decoder_output, decode_block, exec_output) = \ 224 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 225 postacc_code, mem_flags = [], inst_flags = flags, 226 base_class = 'HwLoadStore') 227}}; 228 229 230output header {{ 231 /** 232 * Base class for hw_mfpr and hw_mtpr. 233 */ 234 class HwMoveIPR : public AlphaStaticInst 235 { 236 protected: 237 /// Index of internal processor register. 238 int ipr_index; 239 240 /// Constructor 241 HwMoveIPR(const char *mnem, ExtMachInst _machInst, OpClass __opClass) 242 : AlphaStaticInst(mnem, _machInst, __opClass), 243 ipr_index(HW_IPR_IDX) 244 { 245 } 246 247 std::string 248 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 249 }; 250}}; 251 252output decoder {{ 253 std::string 254 HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) const 255 { 256 if (_numSrcRegs > 0) { 257 // must be mtpr 258 return csprintf("%-10s r%d,IPR(%#x)", 259 mnemonic, RA, ipr_index); 260 } 261 else { 262 // must be mfpr 263 return csprintf("%-10s IPR(%#x),r%d", 264 mnemonic, ipr_index, RA); 265 } 266 } 267}}; 268 269def format HwMoveIPR(code, *flags) {{ 270 all_flags = ['IprAccessOp'] 271 all_flags += flags
| 135 header_output = BasicDeclare.subst(iop) 136 decoder_output = BasicConstructor.subst(iop) 137 decode_block = BasicDecode.subst(iop) 138 exec_output = BasicExecute.subst(iop) 139}}; 140 141//////////////////////////////////////////////////////////////////// 142// 143// hw_ld, hw_st 144// 145 146output header {{ 147 /** 148 * Base class for hw_ld and hw_st. 149 */ 150 class HwLoadStore : public Memory 151 { 152 protected: 153 154 /// Displacement for EA calculation (signed). 155 int16_t disp; 156 157 /// Constructor 158 HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 159 StaticInstPtr _eaCompPtr = nullStaticInstPtr, 160 StaticInstPtr _memAccPtr = nullStaticInstPtr); 161 162 std::string 163 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 164 }; 165}}; 166 167 168output decoder {{ 169 inline 170 HwLoadStore::HwLoadStore(const char *mnem, ExtMachInst _machInst, 171 OpClass __opClass, 172 StaticInstPtr _eaCompPtr, 173 StaticInstPtr _memAccPtr) 174 : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr), 175 disp(HW_LDST_DISP) 176 { 177 memAccessFlags = 0; 178 if (HW_LDST_PHYS) memAccessFlags |= PHYSICAL; 179 if (HW_LDST_ALT) memAccessFlags |= ALTMODE; 180 if (HW_LDST_VPTE) memAccessFlags |= VPTE; 181 if (HW_LDST_LOCK) memAccessFlags |= LOCKED; 182 } 183 184 std::string 185 HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) const 186 { 187#ifdef SS_COMPATIBLE_DISASSEMBLY 188 return csprintf("%-10s r%d,%d(r%d)", mnemonic, RA, disp, RB); 189#else 190 // HW_LDST_LOCK and HW_LDST_COND are the same bit. 191 const char *lock_str = 192 (HW_LDST_LOCK) ? (flags[IsLoad] ? ",LOCK" : ",COND") : ""; 193 194 return csprintf("%-10s r%d,%d(r%d)%s%s%s%s%s", 195 mnemonic, RA, disp, RB, 196 HW_LDST_PHYS ? ",PHYS" : "", 197 HW_LDST_ALT ? ",ALT" : "", 198 HW_LDST_QUAD ? ",QUAD" : "", 199 HW_LDST_VPTE ? ",VPTE" : "", 200 lock_str); 201#endif 202 } 203}}; 204 205def format HwLoad(ea_code, memacc_code, class_ext, *flags) {{ 206 (header_output, decoder_output, decode_block, exec_output) = \ 207 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 208 mem_flags = [], inst_flags = flags, 209 base_class = 'HwLoadStore', exec_template_base = 'Load') 210}}; 211 212 213def format HwStore(ea_code, memacc_code, class_ext, *flags) {{ 214 (header_output, decoder_output, decode_block, exec_output) = \ 215 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 216 mem_flags = [], inst_flags = flags, 217 base_class = 'HwLoadStore', exec_template_base = 'Store') 218}}; 219 220 221def format HwStoreCond(ea_code, memacc_code, postacc_code, class_ext, 222 *flags) {{ 223 (header_output, decoder_output, decode_block, exec_output) = \ 224 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 225 postacc_code, mem_flags = [], inst_flags = flags, 226 base_class = 'HwLoadStore') 227}}; 228 229 230output header {{ 231 /** 232 * Base class for hw_mfpr and hw_mtpr. 233 */ 234 class HwMoveIPR : public AlphaStaticInst 235 { 236 protected: 237 /// Index of internal processor register. 238 int ipr_index; 239 240 /// Constructor 241 HwMoveIPR(const char *mnem, ExtMachInst _machInst, OpClass __opClass) 242 : AlphaStaticInst(mnem, _machInst, __opClass), 243 ipr_index(HW_IPR_IDX) 244 { 245 } 246 247 std::string 248 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 249 }; 250}}; 251 252output decoder {{ 253 std::string 254 HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) const 255 { 256 if (_numSrcRegs > 0) { 257 // must be mtpr 258 return csprintf("%-10s r%d,IPR(%#x)", 259 mnemonic, RA, ipr_index); 260 } 261 else { 262 // must be mfpr 263 return csprintf("%-10s IPR(%#x),r%d", 264 mnemonic, ipr_index, RA); 265 } 266 } 267}}; 268 269def format HwMoveIPR(code, *flags) {{ 270 all_flags = ['IprAccessOp'] 271 all_flags += flags
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