28
29////////////////////////////////////////////////////////////////////
30//
31// PAL calls & PAL-specific instructions
32//
33
34output header {{
35 /**
36 * Base class for emulated call_pal calls (used only in
37 * non-full-system mode).
38 */
39 class EmulatedCallPal : public AlphaStaticInst
40 {
41 protected:
42
43 /// Constructor.
44 EmulatedCallPal(const char *mnem, ExtMachInst _machInst,
45 OpClass __opClass)
46 : AlphaStaticInst(mnem, _machInst, __opClass)
47 {
48 }
49
50 std::string
51 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
52 };
53}};
54
55output decoder {{
56 std::string
57 EmulatedCallPal::generateDisassembly(Addr pc,
58 const SymbolTable *symtab) const
59 {
60#ifdef SS_COMPATIBLE_DISASSEMBLY
61 return csprintf("%s %s", "call_pal", mnemonic);
62#else
63 return csprintf("%-10s %s", "call_pal", mnemonic);
64#endif
65 }
66}};
67
68def format EmulatedCallPal(code, *flags) {{
69 iop = InstObjParams(name, Name, 'EmulatedCallPal', CodeBlock(code), flags)
70 header_output = BasicDeclare.subst(iop)
71 decoder_output = BasicConstructor.subst(iop)
72 decode_block = BasicDecode.subst(iop)
73 exec_output = BasicExecute.subst(iop)
74}};
75
76output header {{
77 /**
78 * Base class for full-system-mode call_pal instructions.
79 * Probably could turn this into a leaf class and get rid of the
80 * parser template.
81 */
82 class CallPalBase : public AlphaStaticInst
83 {
84 protected:
85 int palFunc; ///< Function code part of instruction
86 int palOffset; ///< Target PC, offset from IPR_PAL_BASE
87 bool palValid; ///< is the function code valid?
88 bool palPriv; ///< is this call privileged?
89
90 /// Constructor.
91 CallPalBase(const char *mnem, ExtMachInst _machInst,
92 OpClass __opClass);
93
94 std::string
95 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
96 };
97}};
98
99output decoder {{
100 inline
101 CallPalBase::CallPalBase(const char *mnem, ExtMachInst _machInst,
102 OpClass __opClass)
103 : AlphaStaticInst(mnem, _machInst, __opClass),
104 palFunc(PALFUNC)
105 {
106 // From the 21164 HRM (paraphrased):
107 // Bit 7 of the function code (mask 0x80) indicates
108 // whether the call is privileged (bit 7 == 0) or
109 // unprivileged (bit 7 == 1). The privileged call table
110 // starts at 0x2000, the unprivielged call table starts at
111 // 0x3000. Bits 5-0 (mask 0x3f) are used to calculate the
112 // offset.
113 const int palPrivMask = 0x80;
114 const int palOffsetMask = 0x3f;
115
116 // Pal call is invalid unless all other bits are 0
117 palValid = ((machInst & ~(palPrivMask | palOffsetMask)) == 0);
118 palPriv = ((machInst & palPrivMask) == 0);
119 int shortPalFunc = (machInst & palOffsetMask);
120 // Add 1 to base to set pal-mode bit
121 palOffset = (palPriv ? 0x2001 : 0x3001) + (shortPalFunc << 6);
122 }
123
124 std::string
125 CallPalBase::generateDisassembly(Addr pc, const SymbolTable *symtab) const
126 {
127 return csprintf("%-10s %#x", "call_pal", palFunc);
128 }
129}};
130
131def format CallPal(code, *flags) {{
132 iop = InstObjParams(name, Name, 'CallPalBase', CodeBlock(code), flags)
133 header_output = BasicDeclare.subst(iop)
134 decoder_output = BasicConstructor.subst(iop)
135 decode_block = BasicDecode.subst(iop)
136 exec_output = BasicExecute.subst(iop)
137}};
138
139////////////////////////////////////////////////////////////////////
140//
141// hw_ld, hw_st
142//
143
144output header {{
145 /**
146 * Base class for hw_ld and hw_st.
147 */
148 class HwLoadStore : public Memory
149 {
150 protected:
151
152 /// Displacement for EA calculation (signed).
153 int16_t disp;
154
155 /// Constructor
156 HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
157 StaticInstPtr _eaCompPtr = nullStaticInstPtr,
158 StaticInstPtr _memAccPtr = nullStaticInstPtr);
159
160 std::string
161 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
162 };
163}};
164
165
166output decoder {{
167 inline
168 HwLoadStore::HwLoadStore(const char *mnem, ExtMachInst _machInst,
169 OpClass __opClass,
170 StaticInstPtr _eaCompPtr,
171 StaticInstPtr _memAccPtr)
172 : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr),
173 disp(HW_LDST_DISP)
174 {
175 memAccessFlags = 0;
176 if (HW_LDST_PHYS) memAccessFlags |= PHYSICAL;
177 if (HW_LDST_ALT) memAccessFlags |= ALTMODE;
178 if (HW_LDST_VPTE) memAccessFlags |= VPTE;
179 if (HW_LDST_LOCK) memAccessFlags |= LOCKED;
180 }
181
182 std::string
183 HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) const
184 {
185#ifdef SS_COMPATIBLE_DISASSEMBLY
186 return csprintf("%-10s r%d,%d(r%d)", mnemonic, RA, disp, RB);
187#else
188 // HW_LDST_LOCK and HW_LDST_COND are the same bit.
189 const char *lock_str =
190 (HW_LDST_LOCK) ? (flags[IsLoad] ? ",LOCK" : ",COND") : "";
191
192 return csprintf("%-10s r%d,%d(r%d)%s%s%s%s%s",
193 mnemonic, RA, disp, RB,
194 HW_LDST_PHYS ? ",PHYS" : "",
195 HW_LDST_ALT ? ",ALT" : "",
196 HW_LDST_QUAD ? ",QUAD" : "",
197 HW_LDST_VPTE ? ",VPTE" : "",
198 lock_str);
199#endif
200 }
201}};
202
203def format HwLoad(ea_code, memacc_code, class_ext, *flags) {{
204 (header_output, decoder_output, decode_block, exec_output) = \
205 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code,
206 mem_flags = [], inst_flags = flags,
207 base_class = 'HwLoadStore', exec_template_base = 'Load')
208}};
209
210
211def format HwStore(ea_code, memacc_code, class_ext, *flags) {{
212 (header_output, decoder_output, decode_block, exec_output) = \
213 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code,
214 mem_flags = [], inst_flags = flags,
215 base_class = 'HwLoadStore', exec_template_base = 'Store')
216}};
217
218
219def format HwStoreCond(ea_code, memacc_code, postacc_code, class_ext,
220 *flags) {{
221 (header_output, decoder_output, decode_block, exec_output) = \
222 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code,
223 postacc_code, mem_flags = [], inst_flags = flags,
224 base_class = 'HwLoadStore')
225}};
226
227
228output header {{
229 /**
230 * Base class for hw_mfpr and hw_mtpr.
231 */
232 class HwMoveIPR : public AlphaStaticInst
233 {
234 protected:
235 /// Index of internal processor register.
236 int ipr_index;
237
238 /// Constructor
239 HwMoveIPR(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
240 : AlphaStaticInst(mnem, _machInst, __opClass),
241 ipr_index(HW_IPR_IDX)
242 {
243 }
244
245 std::string
246 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
247 };
248}};
249
250output decoder {{
251 std::string
252 HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) const
253 {
254 if (_numSrcRegs > 0) {
255 // must be mtpr
256 return csprintf("%-10s r%d,IPR(%#x)",
257 mnemonic, RA, ipr_index);
258 }
259 else {
260 // must be mfpr
261 return csprintf("%-10s IPR(%#x),r%d",
262 mnemonic, ipr_index, RA);
263 }
264 }
265}};
266
| 30
31////////////////////////////////////////////////////////////////////
32//
33// PAL calls & PAL-specific instructions
34//
35
36output header {{
37 /**
38 * Base class for emulated call_pal calls (used only in
39 * non-full-system mode).
40 */
41 class EmulatedCallPal : public AlphaStaticInst
42 {
43 protected:
44
45 /// Constructor.
46 EmulatedCallPal(const char *mnem, ExtMachInst _machInst,
47 OpClass __opClass)
48 : AlphaStaticInst(mnem, _machInst, __opClass)
49 {
50 }
51
52 std::string
53 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
54 };
55}};
56
57output decoder {{
58 std::string
59 EmulatedCallPal::generateDisassembly(Addr pc,
60 const SymbolTable *symtab) const
61 {
62#ifdef SS_COMPATIBLE_DISASSEMBLY
63 return csprintf("%s %s", "call_pal", mnemonic);
64#else
65 return csprintf("%-10s %s", "call_pal", mnemonic);
66#endif
67 }
68}};
69
70def format EmulatedCallPal(code, *flags) {{
71 iop = InstObjParams(name, Name, 'EmulatedCallPal', CodeBlock(code), flags)
72 header_output = BasicDeclare.subst(iop)
73 decoder_output = BasicConstructor.subst(iop)
74 decode_block = BasicDecode.subst(iop)
75 exec_output = BasicExecute.subst(iop)
76}};
77
78output header {{
79 /**
80 * Base class for full-system-mode call_pal instructions.
81 * Probably could turn this into a leaf class and get rid of the
82 * parser template.
83 */
84 class CallPalBase : public AlphaStaticInst
85 {
86 protected:
87 int palFunc; ///< Function code part of instruction
88 int palOffset; ///< Target PC, offset from IPR_PAL_BASE
89 bool palValid; ///< is the function code valid?
90 bool palPriv; ///< is this call privileged?
91
92 /// Constructor.
93 CallPalBase(const char *mnem, ExtMachInst _machInst,
94 OpClass __opClass);
95
96 std::string
97 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
98 };
99}};
100
101output decoder {{
102 inline
103 CallPalBase::CallPalBase(const char *mnem, ExtMachInst _machInst,
104 OpClass __opClass)
105 : AlphaStaticInst(mnem, _machInst, __opClass),
106 palFunc(PALFUNC)
107 {
108 // From the 21164 HRM (paraphrased):
109 // Bit 7 of the function code (mask 0x80) indicates
110 // whether the call is privileged (bit 7 == 0) or
111 // unprivileged (bit 7 == 1). The privileged call table
112 // starts at 0x2000, the unprivielged call table starts at
113 // 0x3000. Bits 5-0 (mask 0x3f) are used to calculate the
114 // offset.
115 const int palPrivMask = 0x80;
116 const int palOffsetMask = 0x3f;
117
118 // Pal call is invalid unless all other bits are 0
119 palValid = ((machInst & ~(palPrivMask | palOffsetMask)) == 0);
120 palPriv = ((machInst & palPrivMask) == 0);
121 int shortPalFunc = (machInst & palOffsetMask);
122 // Add 1 to base to set pal-mode bit
123 palOffset = (palPriv ? 0x2001 : 0x3001) + (shortPalFunc << 6);
124 }
125
126 std::string
127 CallPalBase::generateDisassembly(Addr pc, const SymbolTable *symtab) const
128 {
129 return csprintf("%-10s %#x", "call_pal", palFunc);
130 }
131}};
132
133def format CallPal(code, *flags) {{
134 iop = InstObjParams(name, Name, 'CallPalBase', CodeBlock(code), flags)
135 header_output = BasicDeclare.subst(iop)
136 decoder_output = BasicConstructor.subst(iop)
137 decode_block = BasicDecode.subst(iop)
138 exec_output = BasicExecute.subst(iop)
139}};
140
141////////////////////////////////////////////////////////////////////
142//
143// hw_ld, hw_st
144//
145
146output header {{
147 /**
148 * Base class for hw_ld and hw_st.
149 */
150 class HwLoadStore : public Memory
151 {
152 protected:
153
154 /// Displacement for EA calculation (signed).
155 int16_t disp;
156
157 /// Constructor
158 HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
159 StaticInstPtr _eaCompPtr = nullStaticInstPtr,
160 StaticInstPtr _memAccPtr = nullStaticInstPtr);
161
162 std::string
163 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
164 };
165}};
166
167
168output decoder {{
169 inline
170 HwLoadStore::HwLoadStore(const char *mnem, ExtMachInst _machInst,
171 OpClass __opClass,
172 StaticInstPtr _eaCompPtr,
173 StaticInstPtr _memAccPtr)
174 : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr),
175 disp(HW_LDST_DISP)
176 {
177 memAccessFlags = 0;
178 if (HW_LDST_PHYS) memAccessFlags |= PHYSICAL;
179 if (HW_LDST_ALT) memAccessFlags |= ALTMODE;
180 if (HW_LDST_VPTE) memAccessFlags |= VPTE;
181 if (HW_LDST_LOCK) memAccessFlags |= LOCKED;
182 }
183
184 std::string
185 HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) const
186 {
187#ifdef SS_COMPATIBLE_DISASSEMBLY
188 return csprintf("%-10s r%d,%d(r%d)", mnemonic, RA, disp, RB);
189#else
190 // HW_LDST_LOCK and HW_LDST_COND are the same bit.
191 const char *lock_str =
192 (HW_LDST_LOCK) ? (flags[IsLoad] ? ",LOCK" : ",COND") : "";
193
194 return csprintf("%-10s r%d,%d(r%d)%s%s%s%s%s",
195 mnemonic, RA, disp, RB,
196 HW_LDST_PHYS ? ",PHYS" : "",
197 HW_LDST_ALT ? ",ALT" : "",
198 HW_LDST_QUAD ? ",QUAD" : "",
199 HW_LDST_VPTE ? ",VPTE" : "",
200 lock_str);
201#endif
202 }
203}};
204
205def format HwLoad(ea_code, memacc_code, class_ext, *flags) {{
206 (header_output, decoder_output, decode_block, exec_output) = \
207 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code,
208 mem_flags = [], inst_flags = flags,
209 base_class = 'HwLoadStore', exec_template_base = 'Load')
210}};
211
212
213def format HwStore(ea_code, memacc_code, class_ext, *flags) {{
214 (header_output, decoder_output, decode_block, exec_output) = \
215 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code,
216 mem_flags = [], inst_flags = flags,
217 base_class = 'HwLoadStore', exec_template_base = 'Store')
218}};
219
220
221def format HwStoreCond(ea_code, memacc_code, postacc_code, class_ext,
222 *flags) {{
223 (header_output, decoder_output, decode_block, exec_output) = \
224 LoadStoreBase(name, Name + class_ext, ea_code, memacc_code,
225 postacc_code, mem_flags = [], inst_flags = flags,
226 base_class = 'HwLoadStore')
227}};
228
229
230output header {{
231 /**
232 * Base class for hw_mfpr and hw_mtpr.
233 */
234 class HwMoveIPR : public AlphaStaticInst
235 {
236 protected:
237 /// Index of internal processor register.
238 int ipr_index;
239
240 /// Constructor
241 HwMoveIPR(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
242 : AlphaStaticInst(mnem, _machInst, __opClass),
243 ipr_index(HW_IPR_IDX)
244 {
245 }
246
247 std::string
248 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
249 };
250}};
251
252output decoder {{
253 std::string
254 HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) const
255 {
256 if (_numSrcRegs > 0) {
257 // must be mtpr
258 return csprintf("%-10s r%d,IPR(%#x)",
259 mnemonic, RA, ipr_index);
260 }
261 else {
262 // must be mfpr
263 return csprintf("%-10s IPR(%#x),r%d",
264 mnemonic, ipr_index, RA);
265 }
266 }
267}};
268
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